#include <device/pci_def.h>
#include <arch/io.h>
#include <device/pnp_def.h>
-#include <arch/romcc_io.h>
#include <arch/hlt.h>
#include <stdlib.h>
-#include "pc80/serial.c"
#include <console/console.h>
-#include "lib/ramtest.c"
#include "superio/winbond/w83627hf/w83627hf_early_serial.c"
#include "northbridge/intel/i82810/raminit.h"
-#include "cpu/x86/mtrr/earlymtrr.c"
#include "cpu/x86/bist.h"
-#include "southbridge/intel/i82801ax/i82801ax_early_smbus.c"
+#include "southbridge/intel/i82801ax/i82801ax.h"
#include "pc80/udelay_io.c"
-#include "lib/debug.c"
-#include "northbridge/intel/i82810/raminit.c"
+#include <lib.h>
#define SERIAL_DEV PNP_DEV(0x2e, W83627HF_SP1)
-static void main(unsigned long bist)
-{
- if (bist == 0)
- early_mtrr_init();
+void enable_smbus(void);
+int smbus_read_byte(u8 device, u8 address);
+void main(unsigned long bist)
+{
/* FIXME */
outb(0x87, 0x2e);
outb(0x87, 0x2e);
uart_init();
console_init();
-
enable_smbus();
-
report_bist_failure(bist);
-
- /* dump_spd_registers(); */
+ dump_spd_registers();
sdram_set_registers();
sdram_set_spd_registers();
sdram_enable();
- /* ram_check(0, 640 * 1024); */
}
-