This patch unifies the use of config options in v2 to all start with CONFIG_

[coreboot.git] / src / mainboard / msi / ms6178 / auto.c

diff --git a/src/mainboard/msi/ms6178/auto.c b/src/mainboard/msi/ms6178/auto.c
index 966eff5c266366d27eeb22e80968f2af97f70c53..9d91b13018df288085b3620a444af938c3c77d33 100644 (file)
--- a/src/mainboard/msi/ms6178/auto.c
+++ b/src/mainboard/msi/ms6178/auto.c
@@ -26,6 +26,7 @@
 #include <device/pnp_def.h>
 #include <arch/romcc_io.h>
 #include <arch/hlt.h>
+#include <stdlib.h>
 #include "pc80/serial.c"
 #include "arch/i386/lib/console.c"
 #include "ram/ramtest.c"
@@ -36,35 +37,31 @@
 #include "southbridge/intel/i82801xx/i82801xx_early_smbus.c"
 #include "pc80/udelay_io.c"
 #include "northbridge/intel/i82810/raminit.c"
-#include "sdram/generic_sdram.c"
 
 #define SERIAL_DEV PNP_DEV(0x2e, W83627HF_SP1)
 
 static void main(unsigned long bist)
 {
-       static const struct mem_controller memctrl[] = {
-               {
-                       .d0 = PCI_DEV(0, 0, 0),
-                       .channel0 = {0x50, 0x51},
-               }
-       };
-
        if (bist == 0)
                early_mtrr_init();
 
-       enable_smbus();
-
        /* FIXME */
        outb(0x87, 0x2e);
        outb(0x87, 0x2e);
        pnp_write_config(SERIAL_DEV, 0x24, 0x84 | (1 << 6));
-       w83627hf_enable_serial(SERIAL_DEV, TTYS0_BASE);
+       w83627hf_enable_serial(SERIAL_DEV, CONFIG_TTYS0_BASE);
        outb(0x87, 0xaa);
 
        uart_init();
        console_init();
+
+       enable_smbus();
+
        report_bist_failure(bist);
-       /* dump_spd_registers(&memctrl[0]); */
-       sdram_initialize(sizeof(memctrl) / sizeof(memctrl[0]), memctrl);
+
+       /* dump_spd_registers(); */
+       sdram_set_registers();
+       sdram_set_spd_registers();
+       sdram_enable();
        /* ram_check(0, 640 * 1024); */
 }