Drop per-board ram_check() calls for now.

[coreboot.git] / src / mainboard / lippert / roadrunner-lx / romstage.c

diff --git a/src/mainboard/lippert/roadrunner-lx/romstage.c b/src/mainboard/lippert/roadrunner-lx/romstage.c
index 7429e4682cc70116b5adea36aac5e6ca7402808a..32f3b3e3041461916078ad4fd49d260709ee97e9 100644 (file)
--- a/src/mainboard/lippert/roadrunner-lx/romstage.c
+++ b/src/mainboard/lippert/roadrunner-lx/romstage.c
@@ -28,13 +28,12 @@
 #include <device/pnp_def.h>
 #include <arch/hlt.h>
 #include <console/console.h>
-#include "lib/ramtest.c"
 #include "cpu/x86/bist.h"
 #include "cpu/x86/msr.h"
 #include <cpu/amd/lxdef.h>
 #include <cpu/amd/geode_post_code.h>
 #include "southbridge/amd/cs5536/cs5536.h"
-
+#include <spd.h>
 #include "southbridge/amd/cs5536/cs5536_early_smbus.c"
 #include "southbridge/amd/cs5536/cs5536_early_setup.c"
 #include "superio/ite/it8712f/it8712f_early_serial.c"
@@ -42,8 +41,6 @@
 #define ManualConf 1           /* No automatic strapped PLL config */
 #define PLLMSRhi 0x0000049C    /* Manual settings for the PLL */
 #define PLLMSRlo 0x00DE6001
-#define DIMM0 0xA0
-#define DIMM1 0xA2
 
 static inline int spd_read_byte(unsigned int device, unsigned int address)
 {
@@ -99,7 +96,7 @@ void main(unsigned long bist)
        post_code(0x01);
 
        static const struct mem_controller memctrl[] = {
-               {.channel0 = {(0xa << 3) | 0, (0xa << 3) | 1}}
+               {.channel0 = {DIMM0, DIMM1}}
        };
 
        SystemPreInit();
@@ -125,9 +122,6 @@ void main(unsigned long bist)
 
        sdram_initialize(1, memctrl);
 
-       /* Check memory. */
-       /* ram_check(0x00000000, 640 * 1024); */
-
        /* Memory is setup. Return to cache_as_ram.inc and continue to boot. */
        return;
 }