run uart_init() from console_init, just like the other console initialization functions.

[coreboot.git] / src / mainboard / kontron / 986lcd-m / romstage.c

diff --git a/src/mainboard/kontron/986lcd-m/romstage.c b/src/mainboard/kontron/986lcd-m/romstage.c
index f974128604992c93cbed7707c4a19e5076cf9415..357adec08b87165daaabd35761f26d7098bf5075 100644 (file)
--- a/src/mainboard/kontron/986lcd-m/romstage.c
+++ b/src/mainboard/kontron/986lcd-m/romstage.c
@@ -28,25 +28,18 @@
 #include <device/pnp_def.h>
 #include <cpu/x86/lapic.h>
 #include <usbdebug.h>
-
 #include "superio/winbond/w83627thg/w83627thg.h"
-
 #include <pc80/mc146818rtc.h>
 #include "option_table.h"
-
 #include <console/console.h>
 #include <cpu/x86/bist.h>
-
-#include "superio/winbond/w83627thg/w83627thg_early_serial.c"
-
-void enable_smbus(void);
-
-#define SERIAL_DEV PNP_DEV(0x2e, W83627THG_SP1)
-
+#include "superio/winbond/w83627thg/early_serial.c"
 #include "northbridge/intel/i945/i945.h"
 #include "northbridge/intel/i945/raminit.h"
 #include "southbridge/intel/i82801gx/i82801gx.h"
 
+#define SERIAL_DEV PNP_DEV(0x2e, W83627THG_SP1)
+
 void setup_ich7_gpios(void)
 {
        printk(BIOS_DEBUG, " GPIOS...");
@@ -65,12 +58,16 @@ void setup_ich7_gpios(void)
 
 static void ich7_enable_lpc(void)
 {
+       int lpt_en = 0;
+       if (read_option(CMOS_VSTART_lpt, CMOS_VLEN_lpt, 0) != 0) {
+               lpt_en = 1<<2; // enable LPT
+       }
        // Enable Serial IRQ
        pci_write_config8(PCI_DEV(0, 0x1f, 0), 0x64, 0xd0);
        // Set COM1/COM2 decode range
        pci_write_config16(PCI_DEV(0, 0x1f, 0), 0x80, 0x0010);
        // Enable COM1/COM2/KBD/SuperIO1+2
-       pci_write_config16(PCI_DEV(0, 0x1f, 0), 0x82, 0x340b);
+       pci_write_config16(PCI_DEV(0, 0x1f, 0), 0x82, 0x340b | lpt_en);
        // Enable HWM at 0xa00
        pci_write_config32(PCI_DEV(0, 0x1f, 0), 0x84, 0x00fc0a01);
        // COM3 decode
@@ -321,22 +318,13 @@ static void early_ich7_init(void)
 
 #include <cbmem.h>
 
-// Now, this needs to be included because it relies on the symbol
-// __PRE_RAM__ being set during CAR stage (in order to compile the
-// BSS free versions of the functions). Either rewrite the code
-// to be always BSS free, or invent a flag that's better suited than
-// __PRE_RAM__ to determine whether we're in ram init stage (stage 1)
-//
-#include "lib/cbmem.c"
-
 void main(unsigned long bist)
 {
        u32 reg32;
        int boot_mode = 0;
 
-       if (bist == 0) {
+       if (bist == 0)
                enable_lapic();
-       }
 
        /* Force PCIRST# */
        pci_write_config16(PCI_DEV(0, 0x1e, 0), BCTRL, SBR);
@@ -347,13 +335,6 @@ void main(unsigned long bist)
        early_superio_config_w83627thg();
 
        /* Set up the console */
-       uart_init();
-
-#if CONFIG_USBDEBUG
-       i82801gx_enable_usbdebug(1);
-       early_usbdebug_init();
-#endif
-
        console_init();
 
        /* Halt if there was a built in self test failure */
@@ -394,7 +375,7 @@ void main(unsigned long bist)
        dump_spd_registers();
 #endif
 
-       sdram_initialize(boot_mode);
+       sdram_initialize(boot_mode, NULL);
 
        /* Perform some initialization that must run before stage2 */
        early_ich7_init();
@@ -454,4 +435,3 @@ void main(unsigned long bist)
        }
 #endif
 }
-