run uart_init() from console_init, just like the other console initialization functions.
[coreboot.git] / src / mainboard / kontron / 986lcd-m / romstage.c
index 5d773ce6366263d33b34b444269385cd1a923b6e..357adec08b87165daaabd35761f26d7098bf5075 100644 (file)
@@ -58,12 +58,16 @@ void setup_ich7_gpios(void)
 
 static void ich7_enable_lpc(void)
 {
+       int lpt_en = 0;
+       if (read_option(CMOS_VSTART_lpt, CMOS_VLEN_lpt, 0) != 0) {
+               lpt_en = 1<<2; // enable LPT
+       }
        // Enable Serial IRQ
        pci_write_config8(PCI_DEV(0, 0x1f, 0), 0x64, 0xd0);
        // Set COM1/COM2 decode range
        pci_write_config16(PCI_DEV(0, 0x1f, 0), 0x80, 0x0010);
        // Enable COM1/COM2/KBD/SuperIO1+2
-       pci_write_config16(PCI_DEV(0, 0x1f, 0), 0x82, 0x340b);
+       pci_write_config16(PCI_DEV(0, 0x1f, 0), 0x82, 0x340b | lpt_en);
        // Enable HWM at 0xa00
        pci_write_config32(PCI_DEV(0, 0x1f, 0), 0x84, 0x00fc0a01);
        // COM3 decode
@@ -331,13 +335,6 @@ void main(unsigned long bist)
        early_superio_config_w83627thg();
 
        /* Set up the console */
-       uart_init();
-
-#if CONFIG_USBDEBUG
-       i82801gx_enable_usbdebug(1);
-       early_usbdebug_init();
-#endif
-
        console_init();
 
        /* Halt if there was a built in self test failure */
@@ -378,7 +375,7 @@ void main(unsigned long bist)
        dump_spd_registers();
 #endif
 
-       sdram_initialize(boot_mode);
+       sdram_initialize(boot_mode, NULL);
 
        /* Perform some initialization that must run before stage2 */
        early_ich7_init();