#include <pc80/mc146818rtc.h>
#include "pc80/udelay_io.c"
#include <console/console.h>
-#include "lib/ramtest.c"
#include "southbridge/intel/i3100/i3100_early_smbus.c"
#include "southbridge/intel/i3100/i3100_early_lpc.c"
#include "northbridge/intel/i3100/raminit_ep80579.h"
#include "cpu/x86/mtrr/earlymtrr.c"
#include "superio/intel/i3100/i3100_early_serial.c"
#include "cpu/x86/bist.h"
-#include "spd.h"
+#include <spd.h>
#define DEVPRES_CONFIG (DEVPRES_D1F0 | DEVPRES_D2F0 | DEVPRES_D3F0 | DEVPRES_D4F0)
#include "../../intel/jarrell/debug.c"
#include "arch/i386/lib/stages.c"
-/* #define TRUXTON_DEBUG */
-
#define SERIAL_DEV PNP_DEV(0x4e, I3100_SP1)
static void main(unsigned long bist)
{
.node_id = 0,
.f0 = PCI_DEV(0, 0x00, 0),
- .channel0 = { (0xa<<3)|2, (0xa<<3)|3 },
+ .channel0 = { DIMM2, DIMM3 },
}
};
if (bist == 0) {
/* Skip this if there was a built in self test failure */
early_mtrr_init();
- if (memory_initialized()) {
+ if (memory_initialized())
skip_romstage();
- }
}
/* Set up the console */
#ifdef TRUXTON_DEBUG
dump_bar14(PCI_DEV(0, 0x00, 0));
#endif
-
-#ifdef TRUXTON_DEBUG
- ram_fill(0x00000000, 0x02000000);
- ram_verify(0x00000000, 0x02000000);
-#endif
}
-