Drop per-board ram_check() calls for now.

[coreboot.git] / src / mainboard / intel / truxton / romstage.c

diff --git a/src/mainboard/intel/truxton/romstage.c b/src/mainboard/intel/truxton/romstage.c
index 105b82115c85fb41487c45b6faab67b14d945bac..d6ee7c582fa72a1437f2b156cafa688df43ff62e 100644 (file)
--- a/src/mainboard/intel/truxton/romstage.c
+++ b/src/mainboard/intel/truxton/romstage.c
@@ -28,7 +28,6 @@
 #include <pc80/mc146818rtc.h>
 #include "pc80/udelay_io.c"
 #include <console/console.h>
-#include "lib/ramtest.c"
 #include "southbridge/intel/i3100/i3100_early_smbus.c"
 #include "southbridge/intel/i3100/i3100_early_lpc.c"
 #include "northbridge/intel/i3100/raminit_ep80579.h"
@@ -61,16 +60,15 @@ static void main(unsigned long bist)
                {
                        .node_id = 0,
                        .f0 = PCI_DEV(0, 0x00, 0),
-                       .channel0 = { (0xa<<3)|2, (0xa<<3)|3 },
+                       .channel0 = { DIMM2, DIMM3 },
                }
        };
 
        if (bist == 0) {
                /* Skip this if there was a built in self test failure */
                early_mtrr_init();
-               if (memory_initialized()) {
+               if (memory_initialized())
                        skip_romstage();
-               }
        }
 
        /* Set up the console */
@@ -99,10 +97,4 @@ static void main(unsigned long bist)
 #ifdef TRUXTON_DEBUG
        dump_bar14(PCI_DEV(0, 0x00, 0));
 #endif
-
-#ifdef TRUXTON_DEBUG
-       ram_fill(0x00000000, 0x02000000);
-       ram_verify(0x00000000, 0x02000000);
-#endif
 }
-