We define IO_APIC_ADDR in <arch/ioapic.h>, let's use it.

[coreboot.git] / src / mainboard / intel / mtarvon / mptable.c

diff --git a/src/mainboard/intel/mtarvon/mptable.c b/src/mainboard/intel/mtarvon/mptable.c
index 749745df436c72e7545292159b700a87b5fa4d37..2f3cd2793fc228e855c0d4a06c387c763cf66fe4 100644 (file)
--- a/src/mainboard/intel/mtarvon/mptable.c
+++ b/src/mainboard/intel/mtarvon/mptable.c
@@ -22,6 +22,7 @@
 
 #include <console/console.h>
 #include <arch/smp/mpspec.h>
+#include <arch/ioapic.h>
 #include <device/pci.h>
 #include <string.h>
 #include <stdint.h>
@@ -29,7 +30,7 @@
 static void *smp_write_config_table(void *v)
 {
        static const char sig[4] = "PCMP";
-       static const char oem[8] = "Intel   ";
+       static const char oem[8] = "COREBOOT";
        static const char productid[12] = "Mt. Arvon   ";
        struct mp_config_table *mc;
        u8 bus_isa = 7;
@@ -62,33 +63,9 @@ static void *smp_write_config_table(void *v)
        smp_write_bus(mc, bus_isa, "ISA   ");
 
        /* IOAPIC handling */
-       smp_write_ioapic(mc, 0x01, 0x20, 0xfec00000);
-
-       /* ISA backward compatibility interrupts  */
-       smp_write_intsrc(mc, mp_ExtINT, MP_IRQ_TRIGGER_DEFAULT|MP_IRQ_POLARITY_DEFAULT,
-               bus_isa, 0x00, 0x01, 0x00);
-       smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_DEFAULT|MP_IRQ_POLARITY_DEFAULT,
-               bus_isa, 0x01, 0x01, 0x01);
-       smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_DEFAULT|MP_IRQ_POLARITY_DEFAULT,
-               bus_isa, 0x00, 0x01, 0x02);
-       smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_DEFAULT|MP_IRQ_POLARITY_DEFAULT,
-               bus_isa, 0x03, 0x01, 0x03);
-       smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_DEFAULT|MP_IRQ_POLARITY_DEFAULT,
-               bus_isa, 0x04, 0x01, 0x04);
-       smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_DEFAULT|MP_IRQ_POLARITY_DEFAULT,
-               bus_isa, 0x06, 0x01, 0x06);
-       smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_EDGE|MP_IRQ_POLARITY_HIGH,
-               bus_isa, 0x08, 0x01, 0x08);
-       smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_DEFAULT|MP_IRQ_POLARITY_DEFAULT,
-               bus_isa, 0x09, 0x01, 0x09);
-       smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_DEFAULT|MP_IRQ_POLARITY_DEFAULT,
-               bus_isa, 0x0c, 0x01, 0x0c);
-       smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_DEFAULT|MP_IRQ_POLARITY_DEFAULT,
-               bus_isa, 0x0d, 0x01, 0x0d);
-       smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_DEFAULT|MP_IRQ_POLARITY_DEFAULT,
-               bus_isa, 0x0e, 0x01, 0x0e);
-       smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_DEFAULT|MP_IRQ_POLARITY_DEFAULT,
-               bus_isa, 0x0f, 0x01, 0x0f);
+       smp_write_ioapic(mc, 0x01, 0x20, IO_APIC_ADDR);
+
+       mptable_add_isa_interrupts(mc, bus_isa, 0x1, 0);
 
        /* Standard local interrupt assignments */
        smp_write_lintsrc(mc, mp_ExtINT, MP_IRQ_TRIGGER_DEFAULT|MP_IRQ_POLARITY_DEFAULT,