run uart_init() from console_init, just like the other console initialization functions.
[coreboot.git] / src / mainboard / intel / d810e2cb / romstage.c
index 94f1170534e0ffc5e54336f7f21fef346dd9958b..0594e7e402e6d3a21774e36dcbf8d5b3cb7bcdad 100644 (file)
 #include <device/pci_def.h>
 #include <arch/io.h>
 #include <device/pnp_def.h>
-#include <arch/romcc_io.h>
 #include <arch/hlt.h>
 #include <console/console.h>
 #include "southbridge/intel/i82801bx/i82801bx.h"
-#include "southbridge/intel/i82801bx/i82801bx_early_smbus.c"
 #include "northbridge/intel/i82810/raminit.h"
-#include "lib/debug.c"
 #include "pc80/udelay_io.c"
-#include "lib/delay.c"
 #include "cpu/x86/bist.h"
-#include "superio/smsc/smscsuperio/smscsuperio_early_serial.c"
+#include "superio/smsc/smscsuperio/early_serial.c"
 #include "gpio.c"
-#include "northbridge/intel/i82810/raminit.c"
-/* #include "northbridge/intel/i82810/debug.c" */
 #include <lib.h>
 
 #define SERIAL_DEV PNP_DEV(0x4e, SMSCSUPERIO_SP1)
@@ -47,12 +41,11 @@ void main(unsigned long bist)
        mb_gpio_init();
 
        smscsuperio_enable_serial(SERIAL_DEV, CONFIG_TTYS0_BASE);
-       uart_init();
        console_init();
 
        report_bist_failure(bist);
        enable_smbus();
-       /* dump_spd_registers(); */
+       dump_spd_registers();
        sdram_set_registers();
        sdram_set_spd_registers();
        sdram_enable();