Drop per-board ram_check() calls for now.

[coreboot.git] / src / mainboard / iei / pcisa-lx-800-r10 / romstage.c

diff --git a/src/mainboard/iei/pcisa-lx-800-r10/romstage.c b/src/mainboard/iei/pcisa-lx-800-r10/romstage.c
index 4a10c04afc49cd9428e9978a012f291947f321dc..0c06fd2432ecf553bcbd9e95f0ab1cd0811bfab9 100644 (file)
--- a/src/mainboard/iei/pcisa-lx-800-r10/romstage.c
+++ b/src/mainboard/iei/pcisa-lx-800-r10/romstage.c
@@ -31,13 +31,12 @@
 #include <cpu/amd/geode_post_code.h>
 #include "southbridge/amd/cs5536/cs5536.h"
 #include <spd.h>
-
-#define SERIAL_DEV PNP_DEV(0x2e, W83627HF_SP1)
-
 #include "southbridge/amd/cs5536/cs5536_early_smbus.c"
 #include "southbridge/amd/cs5536/cs5536_early_setup.c"
 #include "superio/winbond/w83627hf/w83627hf_early_serial.c"
 
+#define SERIAL_DEV PNP_DEV(0x2e, W83627HF_SP1)
+
 static inline int spd_read_byte(unsigned int device, unsigned int address)
 {
        return smbus_read_byte(device, address);
@@ -59,11 +58,6 @@ static inline int spd_read_byte(unsigned int device, unsigned int address)
 #include "cpu/amd/model_lx/syspreinit.c"
 #include "cpu/amd/model_lx/msrinit.c"
 
-static void mb_gpio_init(void)
-{
-       /* Early mainboard specific GPIO setup. */
-}
-
 void main(unsigned long bist)
 {
        post_code(0x01);
@@ -81,7 +75,6 @@ void main(unsigned long bist)
         * early MSR setup for CS5536.
         */
        w83627hf_enable_serial(SERIAL_DEV, CONFIG_TTYS0_BASE);
-       mb_gpio_init();
        uart_init();
        console_init();
 
@@ -94,9 +87,6 @@ void main(unsigned long bist)
 
        sdram_initialize(1, memctrl);
 
-       /* ram_check(0, 640 * 1024); */
-
        /* Memory is setup. Return to cache_as_ram.inc and continue to boot. */
        return;
 }
-