Drop per-board ram_check() calls for now.

[coreboot.git] / src / mainboard / iei / nova4899r / romstage.c

diff --git a/src/mainboard/iei/nova4899r/romstage.c b/src/mainboard/iei/nova4899r/romstage.c
index a7074d6812a5ac630e533faa240a4a3122bd57d1..1d991972937df06313c0ff339f7aa3f73aedc5ed 100644 (file)
--- a/src/mainboard/iei/nova4899r/romstage.c
+++ b/src/mainboard/iei/nova4899r/romstage.c
@@ -24,9 +24,7 @@
 #include <device/pnp_def.h>
 #include <arch/romcc_io.h>
 #include <arch/hlt.h>
-#include "pc80/serial.c"
 #include <console/console.h>
-#include "lib/ramtest.c"
 #include "superio/winbond/w83977tf/w83977tf_early_serial.c"
 #include "southbridge/amd/cs5530/cs5530_enable_rom.c"
 #include "cpu/x86/bist.h"
@@ -37,20 +35,10 @@
 
 static void main(unsigned long bist)
 {
-       /* Initialize the serial console. */
        w83977tf_enable_serial(SERIAL_DEV, CONFIG_TTYS0_BASE);
        uart_init();
        console_init();
-
-       /* Halt if there was a built in self test failure. */
        report_bist_failure(bist);
-
        cs5530_enable_rom();
-
-       /* Initialize RAM. */
        sdram_init();
-
-       /* Check RAM. */
-       /* ram_check(0x00000000, 640 * 1024); */
 }
-