Drop per-board ram_check() calls for now.

[coreboot.git] / src / mainboard / digitallogic / adl855pc / romstage.c

diff --git a/src/mainboard/digitallogic/adl855pc/romstage.c b/src/mainboard/digitallogic/adl855pc/romstage.c
index 5e782ed1b042544808f425451eb40f80acc003d8..823e5effa4b3a6e50b16fcc63031478747eed30b 100644 (file)
--- a/src/mainboard/digitallogic/adl855pc/romstage.c
+++ b/src/mainboard/digitallogic/adl855pc/romstage.c
@@ -5,6 +5,7 @@
 #include <arch/romcc_io.h>
 #include <arch/hlt.h>
 #include <stdlib.h>
+#include <lib.h>
 #include "pc80/udelay_io.c"
 #include <pc80/mc146818rtc.h>
 #include <console/console.h>
@@ -26,17 +27,9 @@ static inline int spd_read_byte(unsigned device, unsigned address)
 
 #include "northbridge/intel/i855/raminit.c"
 #include "northbridge/intel/i855/reset_test.c"
-#include "lib/generic_sdram.c"
 
 void main(unsigned long bist)
 {
-       static const struct mem_controller memctrl[] = {
-               {
-                       .d0 = PCI_DEV(0, 0, 1),
-                       .channel0 = { DIMM0, 0 },
-               },
-       };
-
        if (bist == 0) {
 #if 0
                enable_lapic();
@@ -55,27 +48,19 @@ void main(unsigned long bist)
        print_pci_devices();
 #endif
 
-       if(!bios_reset_detected()) {
+       if (!bios_reset_detected()) {
                enable_smbus();
 #if 0
-               dump_spd_registers(&memctrl[0]);
+               dump_spd_registers();
                dump_smbus_registers();
 #endif
-
-               sdram_initialize(ARRAY_SIZE(memctrl), memctrl);
-
+               sdram_set_registers();
+               sdram_set_spd_registers();
+               sdram_enable();
        }
 
 #if 0
        dump_pci_devices();
        dump_pci_device(PCI_DEV(0, 0, 0));
-
-       // Check all of memory
-       ram_check(0x00000000, msr.lo+(msr.hi<<32));
-       // Check 16MB of memory @ 0
-       ram_check(0x00000000, 0x01000000);
-       // Check 16MB of memory @ 2GB
-       ram_check(0x80000000, 0x81000000);
 #endif
 }
-