Drop per-board ram_check() calls for now.
[coreboot.git] / src / mainboard / bcom / winnetp680 / romstage.c
index fea599b2a63a2361ead22005f36342437cf28948..7d9a5a7d572262527729f17ae4134e136a14612a 100644 (file)
@@ -32,6 +32,7 @@
 #include "pc80/udelay_io.c"
 #include "lib/delay.c"
 #include <lib.h>
+#include <spd.h>
 #include "southbridge/via/vt8237r/vt8237r_early_smbus.c"
 #include "superio/winbond/w83697hf/w83697hf_early_serial.c"
 #define SERIAL_DEV PNP_DEV(0x2e, W83697HF_SP1)
@@ -46,7 +47,8 @@ static inline int spd_read_byte(unsigned device, unsigned address)
 static void enable_mainboard_devices(void)
 {
        device_t dev;
-       dev = pci_locate_device(PCI_ID(PCI_VENDOR_ID_VIA, PCI_DEVICE_ID_VIA_VT8237R_LPC), 0);
+       dev = pci_locate_device(PCI_ID(PCI_VENDOR_ID_VIA,
+                               PCI_DEVICE_ID_VIA_VT8237R_LPC), 0);
        if (dev == PCI_DEV_INVALID)
                die("Southbridge not found!!!\n");
 
@@ -75,7 +77,7 @@ static const struct mem_controller ctrl = {
        .d0f4 = 0x4000,
        .d0f7 = 0x7000,
        .d1f0 = 0x8000,
-       .channel0 = { 0x50 },
+       .channel0 = { DIMM0 },
 };
 
 void main(unsigned long bist)
@@ -84,26 +86,17 @@ void main(unsigned long bist)
        pci_write_config8(ctrl.d0f0, 0x4f, 0x01);
 
        w83697hf_set_clksel_48(SERIAL_DEV);
-
        w83697hf_enable_serial(SERIAL_DEV, CONFIG_TTYS0_BASE);
        uart_init();
        console_init();
 
-       print_spew("In romstage.c:main()\n");
-
        enable_smbus();
        smbus_fixup(&ctrl);
 
        /* Halt if there was a built-in self test failure. */
        report_bist_failure(bist);
 
-       print_debug("Enabling mainboard devices\n");
        enable_mainboard_devices();
 
        ddr_ram_setup(&ctrl);
-
-       /* ram_check(0, 640 * 1024); */
-
-       print_spew("Leaving romstage.c:main()\n");
 }
-