This patch unifies the use of config options in v2 to all start with CONFIG_
[coreboot.git] / src / mainboard / asus / p3b-f / auto.c
index 5de70fb52138893027f03d7882d5cb6ab3e29934..e300bf679437fef91e4767e5cfa073dd432f36e4 100644 (file)
@@ -32,7 +32,7 @@
 #include "ram/ramtest.c"
 #include "southbridge/intel/i82371eb/i82371eb_early_smbus.c"
 #include "northbridge/intel/i440bx/raminit.h"
-#include "mainboard/asus/mew-vm/debug.c"       /* FIXME */
+#include "lib/debug.c"
 #include "pc80/udelay_io.c"
 #include "lib/delay.c"
 #include "cpu/x86/mtrr/earlymtrr.c"
@@ -50,27 +50,21 @@ static inline int spd_read_byte(unsigned int device, unsigned int address)
 
 #include "northbridge/intel/i440bx/raminit.c"
 #include "northbridge/intel/i440bx/debug.c"
-#include "sdram/generic_sdram.c"
 
 static void main(unsigned long bist)
 {
-       static const struct mem_controller memctrl[] = {
-               {
-                       .d0 = PCI_DEV(0, 0, 0),
-                       .channel0 = {0x50, 0x51, 0x52, 0x53},
-               }
-       };
-
        if (bist == 0)
                early_mtrr_init();
 
        /* FIXME: The ASUS P3B-F has a Winbond W83977EF, actually. */
-       w83977tf_enable_serial(SERIAL_DEV, TTYS0_BASE);
+       w83977tf_enable_serial(SERIAL_DEV, CONFIG_TTYS0_BASE);
        uart_init();
        console_init();
        report_bist_failure(bist);
        enable_smbus();
-       /* dump_spd_registers(&memctrl[0]); */
-       sdram_initialize(ARRAY_SIZE(memctrl), memctrl);
+       /* dump_spd_registers(); */
+       sdram_set_registers();
+       sdram_set_spd_registers();
+       sdram_enable();
        /* ram_check(0, 640 * 1024); */
 }