We define IO_APIC_ADDR in <arch/ioapic.h>, let's use it.

[coreboot.git] / src / mainboard / asus / p2b-d / mptable.c

diff --git a/src/mainboard/asus/p2b-d/mptable.c b/src/mainboard/asus/p2b-d/mptable.c
index 5635c8b8846781fa5d7911ee4442ab8b7fe0f7c9..6d3e4cc757a4be3bdcad87ec44f592dcdc5efb8d 100644 (file)
--- a/src/mainboard/asus/p2b-d/mptable.c
+++ b/src/mainboard/asus/p2b-d/mptable.c
@@ -20,11 +20,12 @@
 
 #include <console/console.h>
 #include <arch/smp/mpspec.h>
+#include <arch/ioapic.h>
 #include <device/pci.h>
 #include <string.h>
 #include <stdint.h>
 
-void *smp_write_config_table(void *v)
+static void *smp_write_config_table(void *v)
 {
        static const char sig[4] = "PCMP";
        static const char oem[8] = "COREBOOT";
@@ -56,7 +57,7 @@ void *smp_write_config_table(void *v)
        smp_write_bus(mc, 2, "ISA   ");
 
        /* I/O APICs: APIC ID  Version  State  Address */
-       smp_write_ioapic(mc, 2, 0x20, 0xfec00000);
+       smp_write_ioapic(mc, 2, 0x20, IO_APIC_ADDR);
        {
                device_t dev;
                struct resource *res;
@@ -86,46 +87,8 @@ void *smp_write_config_table(void *v)
                }
        }
 
-       /* I/O Ints: Type  Polarity  Trigger  Bus ID  IRQ  APIC ID  PIN# */
-       smp_write_intsrc(mc, mp_ExtINT,
-                        MP_IRQ_TRIGGER_DEFAULT | MP_IRQ_POLARITY_DEFAULT, 0x2,
-                        0x0, 0x2, 0x0);
-       smp_write_intsrc(mc, mp_INT,
-                        MP_IRQ_TRIGGER_DEFAULT | MP_IRQ_POLARITY_DEFAULT, 0x2,
-                        0x1, 0x2, 0x1);
-       smp_write_intsrc(mc, mp_INT,
-                        MP_IRQ_TRIGGER_DEFAULT | MP_IRQ_POLARITY_DEFAULT, 0x2,
-                        0x0, 0x2, 0x2);
-       smp_write_intsrc(mc, mp_INT,
-                        MP_IRQ_TRIGGER_DEFAULT | MP_IRQ_POLARITY_DEFAULT, 0x2,
-                        0x3, 0x2, 0x3);
-       smp_write_intsrc(mc, mp_INT,
-                        MP_IRQ_TRIGGER_DEFAULT | MP_IRQ_POLARITY_DEFAULT, 0x2,
-                        0x4, 0x2, 0x4);
-       smp_write_intsrc(mc, mp_INT,
-                        MP_IRQ_TRIGGER_DEFAULT | MP_IRQ_POLARITY_DEFAULT, 0x2,
-                        0x5, 0x2, 0x5);
-       smp_write_intsrc(mc, mp_INT,
-                        MP_IRQ_TRIGGER_DEFAULT | MP_IRQ_POLARITY_DEFAULT, 0x2,
-                        0x6, 0x2, 0x6);
-       smp_write_intsrc(mc, mp_INT,
-                        MP_IRQ_TRIGGER_DEFAULT | MP_IRQ_POLARITY_DEFAULT, 0x2,
-                        0x7, 0x2, 0x7);
-       smp_write_intsrc(mc, mp_INT,
-                        MP_IRQ_TRIGGER_DEFAULT | MP_IRQ_POLARITY_DEFAULT, 0x2,
-                        0x8, 0x2, 0x8);
-       smp_write_intsrc(mc, mp_INT,
-                        MP_IRQ_TRIGGER_DEFAULT | MP_IRQ_POLARITY_DEFAULT, 0x2,
-                        0x9, 0x2, 0x9);
-       smp_write_intsrc(mc, mp_INT,
-                        MP_IRQ_TRIGGER_DEFAULT | MP_IRQ_POLARITY_DEFAULT, 0x2,
-                        0xc, 0x2, 0xc);
-       smp_write_intsrc(mc, mp_INT,
-                        MP_IRQ_TRIGGER_DEFAULT | MP_IRQ_POLARITY_DEFAULT, 0x2,
-                        0xe, 0x2, 0xe);
-       smp_write_intsrc(mc, mp_INT,
-                        MP_IRQ_TRIGGER_DEFAULT | MP_IRQ_POLARITY_DEFAULT, 0x2,
-                        0xf, 0x2, 0xf);
+       mptable_add_isa_interrupts(mc, 0x2, 0x2, 0);
+
        smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL | MP_IRQ_POLARITY_LOW,
                         0x2, 0xb, 0x2, 0x10);
        smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL | MP_IRQ_POLARITY_LOW,
@@ -144,7 +107,7 @@ void *smp_write_config_table(void *v)
        mc->mpe_checksum =
            smp_compute_checksum(smp_next_mpc_entry(mc), mc->mpe_length);
        mc->mpc_checksum = smp_compute_checksum(mc, mc->mpc_length);
-       printk_debug("Wrote the mp table end at: %p - %p\n",
+       printk(BIOS_DEBUG, "Wrote the mp table end at: %p - %p\n",
                     mc, smp_next_mpe_entry(mc));
        return smp_next_mpe_entry(mc);
 }