This patch unifies the use of config options in v2 to all start with CONFIG_

[coreboot.git] / src / mainboard / asus / a8v-e_se / Config.lb

diff --git a/src/mainboard/asus/a8v-e_se/Config.lb b/src/mainboard/asus/a8v-e_se/Config.lb
index 75fb94b27b1bf60c8f666d8171a5f867b08c1114..242c104eac5639e05cd8a03ed1b89f2a1f919be5 100644 (file)
--- a/src/mainboard/asus/a8v-e_se/Config.lb
+++ b/src/mainboard/asus/a8v-e_se/Config.lb
@@ -20,55 +20,42 @@
 ## Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301 USA
 ## 
 
-if USE_FALLBACK_IMAGE
-  default ROM_SECTION_SIZE   = FALLBACK_SIZE
-  default ROM_SECTION_OFFSET = ( ROM_SIZE - FALLBACK_SIZE )
-else
-  default ROM_SECTION_SIZE   = ( ROM_SIZE - FALLBACK_SIZE )
-  default ROM_SECTION_OFFSET = 0
-end
-
-default PAYLOAD_SIZE             = ( ROM_SECTION_SIZE - ROM_IMAGE_SIZE )
-default CONFIG_ROM_PAYLOAD_START = (0xffffffff - ROM_SIZE + ROM_SECTION_OFFSET + 1)
-default CONFIG_ROM_PAYLOAD       = 1
-default _ROMBASE     = (CONFIG_ROM_PAYLOAD_START + PAYLOAD_SIZE)
-default XIP_ROM_SIZE = 65536
-default XIP_ROM_BASE = (_ROMBASE + ROM_IMAGE_SIZE - XIP_ROM_SIZE)
+## CONFIG_XIP_ROM_SIZE must be a power of 2.
+default CONFIG_XIP_ROM_SIZE = 64 * 1024
+include /config/nofailovercalculation.lb
+default CONFIG_ROM_PAYLOAD = 1
 
 arch i386 end 
 
 driver mainboard.o
-if HAVE_ACPI_TABLES
+if CONFIG_HAVE_ACPI_TABLES
   object acpi_tables.o
-  object fadt.o
   makerule dsdt.c
-    depends "$(MAINBOARD)/dsdt.asl"
-    action  "iasl -p $(PWD)/dsdt -tc $(MAINBOARD)/dsdt.asl"
+    depends "$(CONFIG_MAINBOARD)/dsdt.asl"
+    action  "iasl -p $(CURDIR)/dsdt -tc $(CONFIG_MAINBOARD)/dsdt.asl"
     action  "mv dsdt.hex dsdt.c"
   end
   object ./dsdt.o
 end
-if HAVE_MP_TABLE object mptable.o end
-if HAVE_PIRQ_TABLE object irq_tables.o end
+if CONFIG_HAVE_MP_TABLE object mptable.o end
+if CONFIG_HAVE_PIRQ_TABLE object irq_tables.o end
 # object reset.o
 
-if USE_DCACHE_RAM
   if CONFIG_USE_INIT
     makerule ./cache_as_ram_auto.o
-      depends "$(MAINBOARD)/cache_as_ram_auto.c option_table.h"
-      action "$(CC) $(DISTRO_CFLAGS) -I$(TOP)/src -I. $(CPPFLAGS) $(MAINBOARD)/cache_as_ram_auto.c -Os -nostdinc -nostdlib -fno-builtin -Wall -c -o $@"
+      depends "$(CONFIG_MAINBOARD)/cache_as_ram_auto.c option_table.h"
+      action "$(CC) $(DISTRO_CFLAGS) $(CFLAGS) $(CPPFLAGS) -I$(TOP)/src -I. -c $(CONFIG_MAINBOARD)/cache_as_ram_auto.c -o $@"
     end
   else
     makerule ./cache_as_ram_auto.inc
-      depends "$(MAINBOARD)/cache_as_ram_auto.c option_table.h"
-      action "$(CC) $(DISTRO_CFLAGS) -I$(TOP)/src -I. $(CPPFLAGS) $(MAINBOARD)/cache_as_ram_auto.c -Os -nostdinc -nostdlib -fno-builtin -Wall -g -dA -fverbose-asm -c -S -o $@"
+      depends "$(CONFIG_MAINBOARD)/cache_as_ram_auto.c option_table.h"
+      action "$(CC) $(DISTRO_CFLAGS) $(CFLAGS) $(CPPFLAGS) $(DEBUG_CFLAGS) -I$(TOP)/src -I. -c -S $(CONFIG_MAINBOARD)/cache_as_ram_auto.c -o $@"
       action "perl -e 's/\.rodata/.rom.data/g' -pi $@"
       action "perl -e 's/\.text/.section .rom.text/g' -pi $@"
     end
   end
-end
 
-if USE_FALLBACK_IMAGE
+if CONFIG_USE_FALLBACK_IMAGE
   mainboardinit cpu/x86/16bit/entry16.inc
   ldscript /cpu/x86/16bit/entry16.lds
   mainboardinit southbridge/via/k8t890/romstrap.inc
@@ -77,16 +64,14 @@ end
 
 mainboardinit cpu/x86/32bit/entry32.inc
 
-if USE_DCACHE_RAM
   if CONFIG_USE_INIT
     ldscript /cpu/x86/32bit/entry32.lds
   end
   if CONFIG_USE_INIT
     ldscript /cpu/amd/car/cache_as_ram.lds
   end
-end
 
-if USE_FALLBACK_IMAGE
+if CONFIG_USE_FALLBACK_IMAGE
   mainboardinit cpu/x86/16bit/reset16.inc
   ldscript /cpu/x86/16bit/reset16.lds
 else
@@ -94,27 +79,19 @@ else
   ldscript /cpu/x86/32bit/reset32.lds
 end
 
-if USE_DCACHE_RAM
   mainboardinit cpu/amd/car/cache_as_ram.inc
-end
 
-if USE_FALLBACK_IMAGE
-  if USE_DCACHE_RAM
+if CONFIG_USE_FALLBACK_IMAGE
     ldscript /arch/i386/lib/failover.lds
-  end
 end
 
-if USE_DCACHE_RAM
   if CONFIG_USE_INIT
     initobject cache_as_ram_auto.o
   else
     mainboardinit ./cache_as_ram_auto.inc
   end
-end
 
-if CONFIG_CHIP_NAME
-  config chip.h
-end
+config chip.h
 
 chip northbridge/amd/amdk8/root_complex                # Root complex
   device apic_cluster 0 on                     # APIC cluster