Drop per-board ram_check() calls for now.

[coreboot.git] / src / mainboard / artecgroup / dbe61 / romstage.c

diff --git a/src/mainboard/artecgroup/dbe61/romstage.c b/src/mainboard/artecgroup/dbe61/romstage.c
index 1cff578f1b0835f0f56aefa4c001bfd4b2d0b1d9..7b213bf1c748bf7dc075bcd849e13ec20c9ae3d5 100644 (file)
--- a/src/mainboard/artecgroup/dbe61/romstage.c
+++ b/src/mainboard/artecgroup/dbe61/romstage.c
@@ -66,11 +66,6 @@ static int spd_read_byte(unsigned device, unsigned address)
 #include "cpu/amd/model_lx/syspreinit.c"
 #include "cpu/amd/model_lx/msrinit.c"
 
-static void mb_gpio_init(void)
-{
-       /* Early mainboard specific GPIO setup */
-}
-
 void main(unsigned long bist)
 {
        post_code(0x01);
@@ -96,7 +91,6 @@ void main(unsigned long bist)
        msr.lo |= 0x7 << 20;
        wrmsr(MDD_LEG_IO, msr);
 
-       mb_gpio_init();
        uart_init();
        console_init();
 
@@ -109,7 +103,7 @@ void main(unsigned long bist)
 
        sdram_initialize(1, memctrl);
 
-       /* Dump memory configuratation */
+       /* Dump memory configuration. */
 #if 0
        msr = rdmsr(MC_CF07_DATA);
        print_debug("MC_CF07_DATA: ");
@@ -139,8 +133,4 @@ void main(unsigned long bist)
        msr = rdmsr(MC_CF8F_DATA);
        print_debug(" \n");
 #endif
-
-       /* Check memory. */
-       // ram_check(0x00000000, 640 * 1024);
-       // ram_check(1024 * 1024, 2 * 1024 * 1024);
 }