We define IO_APIC_ADDR in <arch/ioapic.h>, let's use it.

[coreboot.git] / src / mainboard / amd / serengeti_cheetah_fam10 / acpi_tables.c

diff --git a/src/mainboard/amd/serengeti_cheetah_fam10/acpi_tables.c b/src/mainboard/amd/serengeti_cheetah_fam10/acpi_tables.c
index 6282ef60c906009dfac076f6db94c0d566bea1f6..9796c725d0416cb097ea6700500022fb3cdf422a 100644 (file)
--- a/src/mainboard/amd/serengeti_cheetah_fam10/acpi_tables.c
+++ b/src/mainboard/amd/serengeti_cheetah_fam10/acpi_tables.c
@@ -20,6 +20,7 @@
 #include <console/console.h>
 #include <string.h>
 #include <arch/acpi.h>
+#include <arch/ioapic.h>
 #include <device/pci.h>
 #include <device/pci_ids.h>
 #include <cpu/x86/msr.h>
@@ -56,8 +57,6 @@ extern const unsigned char AmlCode_ssdt4[];
 extern const unsigned char AmlCode_ssdt5[];
 #endif
 
-#define IO_APIC_ADDR   0xfec00000UL
-
 unsigned long acpi_fill_mcfg(unsigned long current)
 {
        /* Just a dummy */
@@ -160,32 +159,6 @@ unsigned long acpi_fill_madt(unsigned long current)
        return current;
 }
 
-
-extern void update_ssdt(void *ssdt);
-
-static void update_ssdtx(void *ssdtx, int i)
-{
-       u8 *PCI;
-       u8 *HCIN;
-       u8 *UID;
-
-       PCI = ssdtx + 0x32;
-       HCIN = ssdtx + 0x39;
-       UID = ssdtx + 0x40;
-
-       if(i<7) {
-               *PCI  = (u8) ('4' + i - 1);
-       }
-       else {
-               *PCI  = (u8) ('A' + i - 1 - 6);
-       }
-       *HCIN = (u8) i;
-       *UID  = (u8) (i+3);
-
-       /* FIXME: need to update the GSI id in the ssdtx too */
-
-}
-
 unsigned long write_acpi_tables(unsigned long start)
 {
        unsigned long current;