config BOARD_AMD_SERENGETI_CHEETAH
bool "Serengeti Cheetah"
select ARCH_X86
- select CPU_AMD_K8
select CPU_AMD_SOCKET_F
select NORTHBRIDGE_AMD_AMDK8
select NORTHBRIDGE_AMD_AMDK8_ROOT_COMPLEX
select SOUTHBRIDGE_AMD_AMD8111
select SOUTHBRIDGE_AMD_AMD8131
select SUPERIO_WINBOND_W83627HF
+ select BOARD_HAS_FADT
+ select HAVE_BUS_CONFIG
+ select HAVE_OPTION_TABLE
select HAVE_PIRQ_TABLE
- select USE_PRINTK_IN_CAR
+ select HAVE_MP_TABLE
select USE_DCACHE_RAM
- help
- AMD Serengeti Cheetah mainboard.
+ select HAVE_HARD_RESET
+ select LIFT_BSP_APIC_ID
+ #select AP_CODE_IN_CAR
+ select SB_HT_CHAIN_UNITID_OFFSET_ONLY
+ select WAIT_BEFORE_CPUS_INIT
+ select HAVE_ACPI_TABLES
+ select BOARD_ROMSIZE_KB_512
config MAINBOARD_DIR
string
default 0x8
depends on BOARD_AMD_SERENGETI_CHEETAH
-config HAVE_HARD_RESET
- bool
- default y
- depends on BOARD_AMD_SERENGETI_CHEETAH
-
-config IOAPIC
- bool
- default y
- depends on BOARD_AMD_SERENGETI_CHEETAH
-
-config SB_HT_CHAIN_ON_BUS0
- int
- default 2
- depends on BOARD_AMD_SERENGETI_CHEETAH
-
-config LB_CKS_RANGE_END
- int
- default 122
- depends on BOARD_AMD_SERENGETI_CHEETAH
-
-config LB_CKS_LOC
- int
- default 123
- depends on BOARD_AMD_SERENGETI_CHEETAH
-
config MAINBOARD_PART_NUMBER
string
- default "Serengeti-Cheetah"
+ default "Serengeti Cheetah"
depends on BOARD_AMD_SERENGETI_CHEETAH
config HW_MEM_HOLE_SIZEK
default 0x100000
depends on BOARD_AMD_SERENGETI_CHEETAH
-config MEM_TRAIN_SEQ
- bool
- default y
- depends on BOARD_AMD_SERENGETI_CHEETAH
-
-config HAVE_FAILOVER_BOOT
- bool
- default n
- depends on BOARD_AMD_SERENGETI_CHEETAH
-
-config USE_FAILOVER_IMAGE
- bool
- default n
- depends on BOARD_AMD_SERENGETI_CHEETAH
-
config MAX_CPUS
int
default 8
default 4
depends on BOARD_AMD_SERENGETI_CHEETAH
-config MEM_TRAIN_SEQ
+config HW_MEM_HOLE_SIZE_AUTO_INC
bool
- default y
+ default n
depends on BOARD_AMD_SERENGETI_CHEETAH
-config AP_CODE_IN_CAR
- bool
- default y
+config MEM_TRAIN_SEQ
+ int
+ default 1
depends on BOARD_AMD_SERENGETI_CHEETAH
-config HW_MEM_HOLE_SIZE_AUTO_INC
- bool
- default n
+config SB_HT_CHAIN_ON_BUS0
+ int
+ default 2
depends on BOARD_AMD_SERENGETI_CHEETAH
config HT_CHAIN_END_UNITID_BASE
default 0x6
depends on BOARD_AMD_SERENGETI_CHEETAH
-config USE_INIT
- bool
- default n
+config HT_CHAIN_UNITID_BASE
+ hex
+ default 0xa
depends on BOARD_AMD_SERENGETI_CHEETAH
config SERIAL_CPU_INIT
default n
depends on BOARD_AMD_SERENGETI_CHEETAH
-config AP_CODE_IN_CAR
- bool
- default y
- depends on BOARD_AMD_SERENGETI_CHEETAH
-
-config WAIT_BEFORE_CPUS_INIT
- bool
- default y
- depends on BOARD_AMD_SERENGETI_CHEETAH
-
-config SB_HT_CHAIN_ON_BUS0
+config IRQ_SLOT_COUNT
int
- default 2
+ default 11
depends on BOARD_AMD_SERENGETI_CHEETAH
-config CONSOLE_VGA
- bool
- default y
+config MAINBOARD_PCI_SUBSYSTEM_VENDOR_ID
+ hex
+ default 0x1022
depends on BOARD_AMD_SERENGETI_CHEETAH
-config PCI_ROM_RUN
- bool
- default y
+config MAINBOARD_PCI_SUBSYSTEM_DEVICE_ID
+ hex
+ default 0x2b80
depends on BOARD_AMD_SERENGETI_CHEETAH
+config ACPI_SSDTX_NUM
+ int
+ default 4
+ depends on BOARD_AMD_SERENGETI_CHEETAH