uart8250_wait_until_sent(base_port);
}
+int uart8250_can_rx_byte(unsigned base_port)
+{
+ return inb(base_port + UART_LSR) & 0x01;
+}
+
+unsigned char uart8250_rx_byte(unsigned base_port)
+{
+ while(!uart8250_can_rx_byte(base_port))
+ ;
+ return inb(base_port + UART_RBR);
+}
+
void uart8250_init(unsigned base_port, unsigned divisor, unsigned lcs)
{
lcs &= 0x7f;
outb(0x0, base_port + UART_IER);
/* enable fifo's */
outb(0x01, base_port + UART_FCR);
+ /* assert DTR and RTS so the other end is happy */
+ outb(0x03, base_port + UART_MCR);
/* Set Baud Rate Divisor to 12 ==> 115200 Baud */
outb(0x80 | lcs, base_port + UART_LCR);
outb(divisor & 0xFF, base_port + UART_DLL);
outb((divisor >> 8) & 0xFF, base_port + UART_DLM);
outb(lcs, base_port + UART_LCR);
}
+
+/* Initialize a generic uart */
+void init_uart8250(unsigned base_port, struct uart8250 *uart)
+{
+ int divisor;
+ int lcs;
+ divisor = 115200/(uart->baud ? uart->baud: 1);
+ lcs = 3;
+ if (base_port == CONFIG_TTYS0_BASE) {
+ /* Don't reinitialize the console serial port,
+ * This is espeically nasty in SMP.
+ */
+ return;
+ }
+ uart8250_init(base_port, divisor, lcs);
+}