/*
- 2005.11 yhlu add let the real sb to use small uintid
+ * This file is part of the coreboot project.
+ *
+ * Copyright (C) 2003-2004 Linux Networx
+ * (Written by Eric Biederman <ebiederman@lnxi.com> for Linux Networx)
+ * Copyright (C) 2004 David Hendricks <sc@flagen.com>
+ * Copyright (C) 2004 Li-Ta Lo <ollie@lanl.gov>
+ * Copyright (C) 2005-2006 Tyan
+ * (Written by Yinghai Lu <yhlu@tyan.com> for Tyan)
+ * Copyright (C) 2005-2006 Stefan Reinauer <stepan@openbios.org>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; version 2 of the License.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
+ */
+/*
+ 2005.11 yhlu add let the real sb to use small uintid
*/
-
#include <bitops.h>
#include <console/console.h>
#include <device/device.h>
#include <part/hard_reset.h>
#include <part/fallback_boot.h>
+/* The hypertransport link is already optimized in pre-ram code
+ * so don't do it again
+ */
#define OPT_HT_LINK 0
#if OPT_HT_LINK == 1
*/
while(last && last->sibling &&
(last->sibling->path.type == DEVICE_PATH_PCI) &&
- (last->sibling->path.u.pci.devfn > last->path.u.pci.devfn))
+ (last->sibling->path.pci.devfn > last->path.pci.devfn))
{
last = last->sibling;
}
}
/* AMD K8 Unsupported 1Ghz? */
if ((dev->vendor == PCI_VENDOR_ID_AMD) && (dev->device == 0x1100)) {
-#if K8_HT_FREQ_1G_SUPPORT == 1
+#if CONFIG_K8_HT_FREQ_1G_SUPPORT == 1
+ #if CONFIG_K8_REV_F_SUPPORT == 0
if (is_cpu_pre_e0()) { // only e0 later suupport 1GHz HT
freq_cap &= ~(1 << HT_FREQ_1000Mhz);
}
+ #endif
#else
freq_cap &= ~(1 << HT_FREQ_1000Mhz);
#endif
static int ht_setup_link(struct ht_link *prev, device_t dev, unsigned pos)
{
+#if OPT_HT_LINK == 1
static const uint8_t link_width_to_pow2[]= { 3, 4, 0, 5, 1, 2, 0, 0 };
static const uint8_t pow2_to_link_width[] = { 0x7, 4, 5, 0, 1, 3 };
- struct ht_link cur[1];
unsigned present_width_cap, upstream_width_cap;
unsigned present_freq_cap, upstream_freq_cap;
unsigned ln_present_width_in, ln_upstream_width_in;
unsigned ln_present_width_out, ln_upstream_width_out;
unsigned freq, old_freq;
unsigned present_width, upstream_width, old_width;
+#endif
+ struct ht_link cur[1];
int reset_needed;
int linkb_to_host;
}
/* Has the link failed? */
if (ctrl & (1 << 4)) {
- return;
+ /*
+ * Either the link has failed, or we have
+ * a CRC error.
+ * Sometimes this can happen due to link
+ * retrain, so lets knock it down and see
+ * if its transient
+ */
+ ctrl |= ((1 << 4) | (1 <<8)); // Link fail + Crc
+ pci_write_config16(prev.dev, prev.pos + prev.ctrl_off, ctrl);
+ ctrl = pci_read_config16(prev.dev, prev.pos + prev.ctrl_off);
+ if (ctrl & ((1 << 4) | (1 << 8))) {
+ printk_alert("Detected error on Hypertransport Link\n");
+ return;
+ }
}
} while((ctrl & (1 << 5)) == 0);
//actually, only for one HT device HT chain, and unitid is 0
-#if HT_CHAIN_UNITID_BASE == 0
+#if CONFIG_HT_CHAIN_UNITID_BASE == 0
if(offset_unitid) {
return;
}
#endif
/* Check if is already collapsed */
- if((!offset_unitid)|| (offset_unitid && (!((HT_CHAIN_END_UNITID_BASE == 0) && (HT_CHAIN_END_UNITID_BASE <HT_CHAIN_UNITID_BASE))))) {
+ if((!offset_unitid)|| (offset_unitid && (!((CONFIG_HT_CHAIN_END_UNITID_BASE == 0) && (CONFIG_HT_CHAIN_END_UNITID_BASE <CONFIG_HT_CHAIN_UNITID_BASE))))) {
struct device dummy;
uint32_t id;
dummy.bus = bus;
dummy.path.type = DEVICE_PATH_PCI;
- dummy.path.u.pci.devfn = PCI_DEVFN(0, 0);
+ dummy.path.pci.devfn = PCI_DEVFN(0, 0);
id = pci_read_config32(&dummy, PCI_VENDOR_ID);
if ( ! ( (id == 0xffffffff) || (id == 0x00000000) ||
(id == 0x0000ffff) || (id == 0xffff0000) ) ) {
unsigned pos, flags;
dummy.bus = bus;
dummy.path.type = DEVICE_PATH_PCI;
- dummy.path.u.pci.devfn = devfn;
+ dummy.path.pci.devfn = devfn;
id = pci_read_config32(&dummy, PCI_VENDOR_ID);
if ( (id == 0xffffffff) || (id == 0x00000000) ||
(id == 0x0000ffff) || (id == 0xffff0000)) {
unsigned int hypertransport_scan_chain(struct bus *bus,
unsigned min_devfn, unsigned max_devfn, unsigned int max, unsigned *ht_unitid_base, unsigned offset_unitid)
{
- //even HT_CHAIN_UNITID_BASE == 0, we still can go through this function, because of end_of_chain check, also We need it to optimize link
+ //even CONFIG_HT_CHAIN_UNITID_BASE == 0, we still can go through this function, because of end_of_chain check, also We need it to optimize link
unsigned next_unitid, last_unitid;
device_t old_devices, dev, func;
- unsigned min_unitid = (offset_unitid) ? HT_CHAIN_UNITID_BASE:1;
+ unsigned min_unitid = (offset_unitid) ? CONFIG_HT_CHAIN_UNITID_BASE:1;
struct ht_link prev;
device_t last_func = 0;
int ht_dev_num = 0;
+ unsigned max_unitid;
-#if HT_CHAIN_END_UNITID_BASE < HT_CHAIN_UNITID_BASE
- //let't record the device of last ht device, So we can set the Unitid to HT_CHAIN_END_UNITID_BASE
+#if CONFIG_HT_CHAIN_END_UNITID_BASE != 0x20
+ //let't record the device of last ht device, So we can set the Unitid to CONFIG_HT_CHAIN_END_UNITID_BASE
unsigned real_last_unitid;
uint8_t real_last_pos;
device_t real_last_dev;
+ unsigned end_used = 0;
#endif
/* Restore the hypertransport chain to it's unitialized state */
/* If present assign unitid to a hypertransport chain */
last_unitid = min_unitid -1;
- next_unitid = min_unitid;
+ max_unitid = next_unitid = min_unitid;
do {
uint8_t pos;
uint16_t flags;
/* Wait until the link initialization is complete */
do {
ctrl = pci_read_config16(prev.dev, prev.pos + prev.ctrl_off);
- /* Is this the end of the hypertransport chain?
- * Has the link failed?
- * If so further scanning is pointless.
- */
- if (ctrl & ((1 << 6) | (1 << 4))) {
- goto end_of_chain;
+
+ if (ctrl & (1 << 6))
+ goto end_of_chain; // End of chain
+
+ if (ctrl & ((1 << 4) | (1 << 8))) {
+ /*
+ * Either the link has failed, or we have
+ * a CRC error.
+ * Sometimes this can happen due to link
+ * retrain, so lets knock it down and see
+ * if its transient
+ */
+ ctrl |= ((1 << 4) | (1 <<8)); // Link fail + Crc
+ pci_write_config16(prev.dev, prev.pos + prev.ctrl_off, ctrl);
+ ctrl = pci_read_config16(prev.dev, prev.pos + prev.ctrl_off);
+ if (ctrl & ((1 << 4) | (1 << 8))) {
+ printk_alert("Detected error on Hypertransport Link\n");
+ goto end_of_chain;
+ }
}
} while((ctrl & (1 << 5)) == 0);
if (flags & 0x1f) {
break;
}
-
flags &= ~0x1f; /* mask out base Unit ID */
- flags |= next_unitid & 0x1f;
- pci_write_config16(dev, pos + PCI_CAP_FLAGS, flags);
+
+ count = (flags >> 5) & 0x1f; /* get unit count */
+#if CONFIG_HT_CHAIN_END_UNITID_BASE != 0x20
+ if(offset_unitid) {
+ if(next_unitid > (max_devfn>>3)) { // max_devfn will be (0x17<<3)|7 or (0x1f<<3)|7
+ if(!end_used) {
+ next_unitid = CONFIG_HT_CHAIN_END_UNITID_BASE;
+ end_used = 1;
+ } else {
+ goto end_of_chain;
+ }
+ }
+
+ }
+#endif
+
+ flags |= next_unitid & 0x1f;
+ pci_write_config16(dev, pos + PCI_CAP_FLAGS, flags);
/* Update the Unitd id in the device structure */
static_count = 1;
for(func = dev; func; func = func->sibling) {
- func->path.u.pci.devfn += (next_unitid << 3);
- static_count = (func->path.u.pci.devfn >> 3)
- - (dev->path.u.pci.devfn >> 3) + 1;
+ func->path.pci.devfn += (next_unitid << 3);
+ static_count = (func->path.pci.devfn >> 3)
+ - (dev->path.pci.devfn >> 3) + 1;
last_func = func;
}
-
/* Compute the number of unitids consumed */
- count = (flags >> 5) & 0x1f; /* get unit count */
printk_spew("%s count: %04x static_count: %04x\n",
dev_path(dev), count, static_count);
if (count < static_count) {
/* Update the Unitid of the next device */
ht_unitid_base[ht_dev_num] = next_unitid;
ht_dev_num++;
-#if HT_CHAIN_END_UNITID_BASE < HT_CHAIN_UNITID_BASE
- if(offset_unitid) {
- real_last_unitid = next_unitid;
+
+#if CONFIG_HT_CHAIN_END_UNITID_BASE != 0x20
+ if (offset_unitid) {
real_last_pos = pos;
+ real_last_unitid = next_unitid;
real_last_dev = dev;
}
#endif
- next_unitid += count;
+ next_unitid += count;
+ if (next_unitid > max_unitid) {
+ max_unitid = next_unitid;
+ }
/* Setup the hypetransport link */
bus->reset_needed |= ht_setup_link(&prev, dev, pos);
dev->vendor, dev->device,
(dev->enabled? "enabled": "disabled"), next_unitid);
-
- } while((last_unitid != next_unitid) && (next_unitid <= (max_devfn >> 3)));
+ } while (last_unitid != next_unitid);
end_of_chain:
#if OPT_HT_LINK == 1
if(bus->reset_needed) {
}
#endif
-#if HT_CHAIN_END_UNITID_BASE < HT_CHAIN_UNITID_BASE
- if(offset_unitid && (ht_dev_num>0)) {
+#if CONFIG_HT_CHAIN_END_UNITID_BASE != 0x20
+ if(offset_unitid && (ht_dev_num>1) && (real_last_unitid != CONFIG_HT_CHAIN_END_UNITID_BASE) && !end_used) {
uint16_t flags;
int i;
device_t last_func = 0;
flags = pci_read_config16(real_last_dev, real_last_pos + PCI_CAP_FLAGS);
flags &= ~0x1f;
- flags |= HT_CHAIN_END_UNITID_BASE & 0x1f;
+ flags |= CONFIG_HT_CHAIN_END_UNITID_BASE & 0x1f;
pci_write_config16(real_last_dev, real_last_pos + PCI_CAP_FLAGS, flags);
for(func = real_last_dev; func; func = func->sibling) {
- func->path.u.pci.devfn -= ((real_last_unitid - HT_CHAIN_END_UNITID_BASE) << 3);
+ func->path.pci.devfn -= ((real_last_unitid - CONFIG_HT_CHAIN_END_UNITID_BASE) << 3);
last_func = func;
}
+
+ ht_unitid_base[ht_dev_num-1] = CONFIG_HT_CHAIN_END_UNITID_BASE; // update last one
- ht_unitid_base[ht_dev_num-1] = HT_CHAIN_END_UNITID_BASE; // update last one
-
- next_unitid = real_last_unitid;
+ printk_debug(" unitid: %04x --> %04x\n",
+ real_last_unitid, CONFIG_HT_CHAIN_END_UNITID_BASE);
+
}
#endif
+ next_unitid = max_unitid;
- if (next_unitid > 0x1f) {
- next_unitid = 0x1f;
+ if (next_unitid > 0x20) {
+ next_unitid = 0x20;
+ }
+ if( (bus->secondary == 0) && (next_unitid > 0x18)) {
+ next_unitid = 0x18; /* avoid K8 on bus 0 */
}
/* Die if any leftover Static devices are are found.
/* Now that nothing is overlapping it is safe to scan the
* children.
*/
- max = pci_scan_bus(bus, 0x00, (next_unitid << 3)|7, max);
+ max = pci_scan_bus(bus, 0x00, ((next_unitid-1) << 3)|7, max);
return max;
}
*
* @return The maximum bus number found, after scanning all subordinate busses
*/
+unsigned int hypertransport_scan_chain_x(struct bus *bus,
+ unsigned min_devfn, unsigned max_devfn, unsigned int max)
+{
+ unsigned ht_unitid_base[4];
+ unsigned offset_unitid = 1;
+ return hypertransport_scan_chain(bus, min_devfn, max_devfn, max, ht_unitid_base, offset_unitid);
+}
+
unsigned int ht_scan_bridge(struct device *dev, unsigned int max)
{
- return do_pci_scan_bridge(dev, max, hypertransport_scan_chain);
+ return do_pci_scan_bridge(dev, max, hypertransport_scan_chain_x);
}
projects / coreboot.git / blobdiff