Add support for Intel Sandybridge CPU

[coreboot.git] / src / cpu / intel / speedstep / acpi.c

diff --git a/src/cpu/intel/speedstep/acpi.c b/src/cpu/intel/speedstep/acpi.c
index 33898e3280a04eb1d1c0116f323a9030576dd9ce..00c4ae937cf8ac7eb745eac077b9166362625bf6 100644 (file)
--- a/src/cpu/intel/speedstep/acpi.c
+++ b/src/cpu/intel/speedstep/acpi.c
@@ -25,6 +25,8 @@
 #include <arch/acpigen.h>
 #include <arch/cpu.h>
 #include <cpu/x86/msr.h>
+#include <cpu/intel/acpi.h>
+#include <cpu/intel/speedstep.h>
 #include <device/device.h>
 
 // XXX: PSS table values for power consumption are for Merom only
@@ -60,14 +62,22 @@ static int get_fsb(void)
        return 200;
 }
 
+int __attribute__((weak)) get_cst_entries(struct cst_entry **entries __attribute__((unused)))
+{
+       return 0;
+}
+
 void generate_cpu_entries(void)
 {
        int len_pr, len_ps;
-       int coreID, cpuID, pcontrol_blk=0x510, plen=6;
+       int coreID, cpuID, pcontrol_blk = PMB0_BASE, plen = 6;
        msr_t msr;
        int totalcores = determine_total_number_of_cores();
        int cores_per_package = (cpuid_ebx(1)>>16) & 0xff;
        int numcpus = totalcores/cores_per_package; // this assumes that all CPUs share the same layout
+       int count;
+       struct cst_entry *cst_entries;
+
        printk(BIOS_DEBUG, "Found %d CPU(s) with %d core(s) each.\n", numcpus, cores_per_package);
 
        for (cpuID=1; cpuID <=numcpus; cpuID++) {
@@ -79,12 +89,12 @@ void generate_cpu_entries(void)
                len_pr = acpigen_write_processor((cpuID-1)*cores_per_package+coreID-1, pcontrol_blk, plen);
                        len_pr += acpigen_write_empty_PCT();
                        len_pr += acpigen_write_PSD_package(cpuID-1,cores_per_package,SW_ANY);
+                       if ((count = get_cst_entries(&cst_entries)) > 0)
+                               len_pr += acpigen_write_CST_package(cst_entries, count);
                        len_pr += acpigen_write_name("_PSS");
 
                        int max_states=8;
                        int busratio_step=2;
-#define IA32_PLATFORM_ID 0x017
-#define IA32_PERF_STS 0x198
                        msr = rdmsr(IA32_PERF_STS);
                        int busratio_min=(msr.lo >> 24) & 0x1f;
                        int busratio_max=(msr.hi >> (40-32)) & 0x1f;