This is a general cleanup patch

[coreboot.git] / src / cpu / intel / model_6fx / cache_as_ram_disable.c

diff --git a/src/cpu/intel/model_6fx/cache_as_ram_disable.c b/src/cpu/intel/model_6fx/cache_as_ram_disable.c
index fcdd3f2e19878cfd90bd33e953dd05b9dc696dc7..9af667d655566ae48ad346ec3b8936c54571774e 100644 (file)
--- a/src/cpu/intel/model_6fx/cache_as_ram_disable.c
+++ b/src/cpu/intel/model_6fx/cache_as_ram_disable.c
@@ -55,7 +55,7 @@ void stage1_main(unsigned long bist)
 
        /* No servicable parts below this line .. */
 
-#if CAR_DEBUG
+#ifdef CAR_DEBUG
         /* Check value of esp to verify if we have enough rom for stack in Cache as RAM */
        unsigned v_esp;
        __asm__ volatile (