Add AMD C32 support.

[coreboot.git] / src / cpu / amd / model_10xxx / processor_name.c

diff --git a/src/cpu/amd/model_10xxx/processor_name.c b/src/cpu/amd/model_10xxx/processor_name.c
index 65f97765b209780e37c568193e30acb7ffc9508c..62040d9a5194d8a2d3caed0f591ee560e9d22c4f 100644 (file)
--- a/src/cpu/amd/model_10xxx/processor_name.c
+++ b/src/cpu/amd/model_10xxx/processor_name.c
@@ -3,6 +3,7 @@
  *
  * Copyright (C) 2007 Advanced Micro Devices, Inc.
  * Copyright (C) 2008 Peter Stuge
+ * Copyright (C) 2010 Marc Jones <marcj303@gmail.com>
  *
  * This program is free software; you can redistribute it and/or modify
  * it under the terms of the GNU General Public License as published by
@@ -73,12 +74,31 @@ static const struct str_s String2_socket_F[] = {
 static const struct str_s String1_socket_AM2[] = {
        {0x00, 0x00, 0x00, "AMD Athlon(tm) Processor LE-"},
        {0x00, 0x00, 0x01, "AMD Sempron(tm) Processor LE-"},
+       {0x00, 0x00, 0x02, "AMD Sempron(tm) 1"},
+       {0x00, 0x00, 0x03, "AMD Athlon(tm) II 1"},
        {0x00, 0x01, 0x00, "Dual-Core AMD Opteron(tm) Processor 13"},
        {0x00, 0x01, 0x01, "AMD Athlon(tm)"},
+       {0x00, 0x01, 0x03, "AMD Athlon(tm) II X2 2"},
+       {0x00, 0x01, 0x04, "AMD Athlon(tm) II X2 B"},
+       {0x00, 0x01, 0x05, "AMD Athlon(tm) II X2"},
+       {0x00, 0x01, 0x07, "AMD Phenom(tm) II X2 5"},
+       {0x00, 0x01, 0x0A, "AMD Phenom(tm) II X2"},
+       {0x00, 0x01, 0x0B, "AMD Phenom(tm) II X2 B"},
        {0x00, 0x02, 0x00, "AMD Phenom(tm)"},
+       {0x00, 0x02, 0x03, "AMD Phenom(tm) II X3 B"},
+       {0x00, 0x02, 0x04, "AMD Phenom(tm) II X3"},
+       {0x00, 0x02, 0x07, "AMD Athlon(tm) II X3 4"},
+       {0x00, 0x02, 0x08, "AMD Phenom(tm) II X3 7"},
+       {0x00, 0x02, 0x0A, "AMD Athlon(tm) II X3"},
        {0x00, 0x03, 0x00, "Quad-Core AMD Opteron(tm) Processor 13"},
        {0x00, 0x03, 0x01, "AMD Phenom(tm) FX-"},
        {0x00, 0x03, 0x02, "AMD Phenom(tm)"},
+       {0x00, 0x03, 0x03, "AMD Phenom(tm) II X4 9"},
+       {0x00, 0x03, 0x04, "AMD Phenom(tm) II X4 8"},
+       {0x00, 0x03, 0x07, "AMD Phenom(tm) II X4 B"},
+       {0x00, 0x03, 0x08, "AMD Phenom(tm) II X4"},
+       {0x00, 0x03, 0x0A, "AMD Athlon(tm) II X4 6"},
+       {0x00, 0x03, 0x0F, "AMD Athlon(tm) II X4"},
        {0, 0, 0, NULL}
 };
 
@@ -93,40 +113,75 @@ static const struct str_s String2_socket_AM2[] = {
        {0x00, 0x00, 0x07, "70"},
        {0x00, 0x00, 0x08, "80"},
        {0x00, 0x00, 0x09, "90"},
+       {0x00, 0x00, 0x09, " Processor"},
+       {0x00, 0x00, 0x09, "u Processor"},
        {0x00, 0x01, 0x00, "00 Dual-Core Processor"},
        {0x00, 0x01, 0x01, "00e Dual-Core Processor"},
        {0x00, 0x01, 0x02, "00B Dual-Core Processor"},
        {0x00, 0x01, 0x03, "50 Dual-Core Processor"},
        {0x00, 0x01, 0x04, "50e Dual-Core Processor"},
        {0x00, 0x01, 0x05, "50B Dual-Core Processor"},
+       {0x00, 0x01, 0x06, " Processor"},
+       {0x00, 0x01, 0x07, "e Processor"},
+       {0x00, 0x01, 0x09, "0 Processor"},
+       {0x00, 0x01, 0x0A, "0e Processor"},
+       {0x00, 0x01, 0x0B, "u Processor"},
        {0x00, 0x02, 0x00, "00 Triple-Core Processor"},
        {0x00, 0x02, 0x01, "00e Triple-Core Processor"},
        {0x00, 0x02, 0x02, "00B Triple-Core Processor"},
        {0x00, 0x02, 0x03, "50 Triple-Core Processor"},
        {0x00, 0x02, 0x04, "50e Triple-Core Processor"},
        {0x00, 0x02, 0x05, "50B Triple-Core Processor"},
+       {0x00, 0x02, 0x06, " Processor"},
+       {0x00, 0x02, 0x07, "e Processor"},
+       {0x00, 0x02, 0x09, "0e Processor"},
+       {0x00, 0x02, 0x0A, "0 Processor"},
        {0x00, 0x03, 0x00, "00 Quad-Core Processor"},
        {0x00, 0x03, 0x01, "00e Quad-Core Processor"},
        {0x00, 0x03, 0x02, "00B Quad-Core Processor"},
        {0x00, 0x03, 0x03, "50 Quad-Core Processor"},
        {0x00, 0x03, 0x04, "50e Quad-Core Processor"},
        {0x00, 0x03, 0x05, "50B Quad-Core Processor"},
+       {0x00, 0x03, 0x06, " Processor"},
+       {0x00, 0x03, 0x07, "e Processor"},
+       {0x00, 0x03, 0x09, "0e Processor"},
        {0x00, 0x03, 0x0A, " SE"},
        {0x00, 0x03, 0x0B, " HE"},
        {0x00, 0x03, 0x0C, " EE"},
        {0x00, 0x03, 0x0D, " Quad-Core Processor"},
+       {0x00, 0x03, 0x0E, "0 Processor"},
        {0x00, 0xFF, 0x0F, ""},
        {0, 0, 0, NULL}
 };
 
+static const struct str_s String1_socket_C32[] = {
+       {0x00, 0x03, 0x00, "AMD Opteron(tm) Processor 41"},
+       {0x00, 0x05, 0x00, "AMD Opteron(tm) Processor 41"},
+       {0x01, 0x03, 0x01, "Embedded AMD Opteron(tm) Processor "},
+       {0x01, 0x05, 0x01, "Embedded AMD Opteron(tm) Processor "},
+       {0, 0, 0, NULL}
+};
 
-char const *unknown = "AMD Processor model unknown";
-char const *unknown2 = " type unknown";
-char const *sample = "AMD Engineering Sample";
-char const *thermal = "AMD Thermal Test Kit";
+static const struct str_s String2_socket_C32[] = {
+       {0x00, 0x03, 0x00, " HE"},
+       {0x00, 0x03, 0x01, " EE"},
+       {0x00, 0x05, 0x00, " HE"},
+       {0x00, 0x05, 0x01, " EE"},
+       {0x01, 0x03, 0x01, "QS HE"},
+       {0x01, 0x03, 0x02, "LE HE"},
+       {0x01, 0x05, 0x01, "KX HE"},
+       {0x01, 0x05, 0x02, "GL EE"},
+       {0, 0, 0, NULL}
+};
 
+const char const *unknown = "AMD Processor model unknown";
+const char const *unknown2 = " type unknown";
+const char const *sample = "AMD Engineering Sample";
+const char const *thermal = "AMD Thermal Test Kit";
 
-int strcpymax(char *dst, const char *src, int buflen) {
+
+static int strcpymax(char *dst, const char *src, int buflen)
+{
        int i;
        for (i = 0; i < buflen && src[i]; i++)
                dst[i] = src[i];
@@ -168,7 +223,7 @@ int init_processor_name(void)
        memset(program_string, 0, sizeof(program_string));
 
        if (!Model) {
-               processor_name_string = Pg ? sample : thermal;
+               processor_name_string = Pg ? thermal : sample;
                goto done;
        }
 
@@ -182,6 +237,10 @@ int init_processor_name(void)
                str = String1_socket_AM2;
                str2 = String2_socket_AM2;
                break;
+       case 5:         /* C32 */
+               str = String1_socket_C32;
+               str2 = String2_socket_C32;
+               break;
        default:
                goto done;
        }
@@ -226,7 +285,7 @@ done:
        strcpymax(&program_string[j], processor_name_string,
                  sizeof(program_string) - j);
 
-       printk_debug("CPU model: %s\n", program_string);
+       printk(BIOS_DEBUG, "CPU model: %s\n", program_string);
 
        for (i = 0; i < 6; i++) {
                msr.lo = p_program_string[(2 * i) + 0];