Rename almost all occurences of LinuxBIOS to coreboot.

[coreboot.git] / src / cpu / amd / car / disable_cache_as_ram.c

diff --git a/src/cpu/amd/car/disable_cache_as_ram.c b/src/cpu/amd/car/disable_cache_as_ram.c
index a699cae99bf32a2e08d1556f09a9d76eca450cb9..0f5f831270de8b840f1b0969e2977f5942f08a3b 100644 (file)
--- a/src/cpu/amd/car/disable_cache_as_ram.c
+++ b/src/cpu/amd/car/disable_cache_as_ram.c
@@ -1,11 +1,10 @@
 /* by yhlu 6.2005 */
 /* be warned, this file will be used other cores and core 0 / node 0 */
+static inline __attribute__((always_inline)) void disable_cache_as_ram(void)
+{
+
         __asm__ volatile (
-       /* 
-       FIXME : backup stack in CACHE_AS_RAM into mmx and sse and after we get STACK up, we restore that.
-               It is only needed if we want to go back
-       */
-       
+
         /* We don't need cache as ram for now on */
         /* disable cache */
         "movl    %cr0, %eax\n\t"
@@ -22,7 +21,7 @@
         "wrmsr\n\t"
 #endif
 
-        /* disable fixed mtrr from now on, it will be enabled by linuxbios_ram again*/
+        /* disable fixed mtrr from now on, it will be enabled by coreboot_ram again*/
         "movl    $0xC0010010, %ecx\n\t"
 //        "movl    $SYSCFG_MSR, %ecx\n\t"
         "rdmsr\n\t"
@@ -44,3 +43,21 @@
         "movl    %eax, %cr0\n\t"
 
         );
+}
+
+static void disable_cache_as_ram_bsp(void)
+{
+       __asm__ volatile (
+//             "pushl %eax\n\t"
+               "pushl %edx\n\t"
+               "pushl %ecx\n\t"
+       );
+
+       disable_cache_as_ram();
+        __asm__ volatile (
+                "popl %ecx\n\t"
+                "popl %edx\n\t"
+//                "popl %eax\n\t"
+        );
+}
+