#######################################################
#
-# Main options file for LinuxBIOS
+# Main options file for coreboot
#
# Each option used by a part must be defined in
# this file. The format for options is:
export always
comment "Objcopy command"
end
-define LINUXBIOS_VERSION
+define COREBOOT_VERSION
default "2.0.0"
export always
format "\"%s\""
- comment "LinuxBIOS version"
+ comment "coreboot version"
end
-define LINUXBIOS_EXTRA_VERSION
+define COREBOOT_EXTRA_VERSION
default ""
export used
format "\"%s\""
- comment "LinuxBIOS extra version"
+ comment "coreboot extra version"
end
-define LINUXBIOS_BUILD
+define COREBOOT_BUILD
default "$(shell date)"
export always
format "\"%s\""
comment "Build date"
end
-define LINUXBIOS_COMPILE_TIME
+define COREBOOT_COMPILE_TIME
default "$(shell date +%T)"
export always
format "\"%s\""
comment "Build time"
end
-define LINUXBIOS_COMPILE_BY
+define COREBOOT_COMPILE_BY
default "$(shell whoami)"
export always
format "\"%s\""
comment "Who build this image"
end
-define LINUXBIOS_COMPILE_HOST
+define COREBOOT_COMPILE_HOST
default "$(shell hostname)"
export always
format "\"%s\""
comment "Build host"
end
-define LINUXBIOS_COMPILE_DOMAIN
+define COREBOOT_COMPILE_DOMAIN
default "$(shell dnsdomainname)"
export always
format "\"%s\""
comment "Build domain name"
end
-define LINUXBIOS_COMPILER
+define COREBOOT_COMPILER
default "$(shell $(CC) $(CFLAGS) -v 2>&1 | tail -n 1)"
export always
format "\"%s\""
comment "Build compiler"
end
-define LINUXBIOS_LINKER
- default "$(shell $(CC) -Wl,--version 2>&1 | grep version | tail -n 1)"
+define COREBOOT_LINKER
+ default "$(shell $(CC) -Wl,--version 2>&1 | grep \" ld\")"
export always
format "\"%s\""
comment "Build linker"
end
-define LINUXBIOS_ASSEMBLER
+define COREBOOT_ASSEMBLER
default "$(shell touch dummy.s ; $(CC) -c -Wa,-v dummy.s 2>&1; rm -f dummy.s dummy.o )"
export always
format "\"%s\""
comment "Use stage 1 initialization code"
end
+define COREBOOT_V2
+ default 1
+ export always
+ comment "This is used by code to determine v2 vs v3"
+end
+
###############################################
# ROM image options
###############################################
default {PAYLOAD_SIZE}
format "0x%x"
export always
- comment "Base address of LinuxBIOS in ROM"
+ comment "Base address of coreboot in ROM"
end
define _ROMSTART
default none
format "0x%x"
export used
- comment "Start address of LinuxBIOS in ROM"
+ comment "Start address of coreboot in ROM"
end
define _RESET
default {_ROMBASE}
default none
format "0x%x"
export always
- comment "Base address of LinuxBIOS in RAM"
+ comment "Base address of coreboot in RAM"
end
define _RAMSTART
default none
format "0x%x"
export used
- comment "Start address of LinuxBIOS in RAM"
+ comment "Start address of coreboot in RAM"
end
define USE_DCACHE_RAM
default 0
define CONFIG_AP_CODE_IN_CAR
default 0
export always
- comment "will copy linuxbios_apc to AP cache ane execute in AP"
+ comment "will copy coreboot_apc to AP cache ane execute in AP"
end
define MEM_TRAIN_SEQ
default 0
default 0
format "0x%x"
export used
- comment "Start address of area to cache during LinuxBIOS execution directly from ROM"
+ comment "Start address of area to cache during coreboot execution directly from ROM"
end
define XIP_ROM_SIZE
default 0
format "0x%x"
export used
- comment "Size of area to cache during LinuxBIOS execution directly from ROM"
+ comment "Size of area to cache during coreboot execution directly from ROM"
end
define CONFIG_COMPRESS
default 1
default 49
format "%d"
export always
- comment "First CMOS byte to use for LinuxBIOS options"
+ comment "First CMOS byte to use for coreboot options"
end
define LB_CKS_RANGE_END
default 125
format "%d"
export always
- comment "Last CMOS byte to use for LinuxBIOS options"
+ comment "Last CMOS byte to use for coreboot options"
end
define LB_CKS_LOC
default 126
###############################################
define DEBUG
- default 1
+ default 0
export always
- comment "Enable debugging code"
+ comment "Enable x86emu debugging code"
end
define CONFIG_CONSOLE_VGA
default 0
export always
comment "use printk instead of print in CAR stage code"
end
+define ASSEMBLER_DEBUG
+ default 0
+ export always
+ comment "Create disassembly files for debugging"
+end
-
###############################################
# Mainboard options
###############################################
export always
comment "Should multiple cpus per die be enabled?"
end
+define CONFIG_AP_IN_SIPI_WAIT
+ default 0
+ export always
+ comment "Should application processors go to SIPI wait state after initialization? (Required for Intel Core Duo)"
+end
define HAVE_MP_TABLE
default none
export used
# Boot options
###############################################
+define CONFIG_MULTIBOOT
+ default 1
+ export always
+ comment "Use Multiboot (rather than ELF boot notes) to boot the payload"
+end
define CONFIG_IDE_PAYLOAD
default 0
export always
export always
comment "Enable FAT filesystem support"
end
+define CONFIG_CBFS
+ default 0
+ export always
+ comment "The new CBFS file system"
+end
define AUTOBOOT_DELAY
default 2
export always
export used
comment "Define if we have a PIRQ table"
end
+define PIRQ_ROUTE
+ default 0
+ export always
+ comment "Define if we have a PIRQ table and want routing IRQs"
+end
define IRQ_SLOT_COUNT
default none
export used
# Misc options
###############################################
-define CONFIG_CHIP_NAME
- default 0
- export always
- comment "Compile in the chip name"
-end
-
define CONFIG_GDB_STUB
default 0
export used
export used
comment "Have hard reset"
end
+define HAVE_SMI_HANDLER
+ default 0
+ export always
+ comment "Set, if the board needs an SMI handler"
+end
define MEMORY_HOLE
default none
export used
# Misc device options
###############################################
+define HAVE_FANCTL
+ default 0
+ export used
+ comment "Include board specific FAN control initialization"
+end
define CONFIG_TSC_X86RDTSC_CALIBRATE_WITH_TIMER2
default 0
export used
comment "Define to build ACPI tables"
end
+define HAVE_ACPI_RESUME
+ default 0
+ export always
+ comment "Define to build ACPI with resume support"
+end
+
define ACPI_SSDTX_NUM
default 0
export always
comment "enable mmconfig for pci conf"
end
+define MMCONF_BASE_ADDRESS
+ default none
+ format "0x%x"
+ export used
+ comment "enable mmconfig base address"
+end
+
define HW_MEM_HOLE_SIZEK
default 0
export always
comment "Init x86 ROMs on all PCI devices"
end
+define CONFIG_PCI_OPTION_ROM_RUN_YABEL
+ default 0
+ export used
+ comment "Use Yabel instead of old bios emulator"
+end
+
+define CONFIG_YABEL_DEBUG_FLAGS
+ default 0
+ export used
+ comment "YABEL debug flags, for possible values, see util/x86emu/yabel/debug.h"
+end
+
+define CONFIG_YABEL_PCI_ACCESS_OTHER_DEVICES
+ default 0
+ export used
+ comment "Allow Option ROMs executed by YABEL to access the config space of devices other than the one YABEL is running for. This may be needed by some onboard Graphics cards ROMs."
+
+end
+
+define CONFIG_PCI_OPTION_ROM_RUN_VM86
+ default 0
+ export used
+ comment "Use Yabel instead of old bios emulator"
+end
+
define CONFIG_PCI_64BIT_PREF_MEM
default 0
export always
comment "use AMD MCT to init RAM instead of native code"
end
+define AMD_UCODE_PATCH_FILE
+ default none
+ export used
+ format "\"%s\""
+ comment "name of the microcode patch file"
+end
+
+define K8_MEM_BANK_B_ONLY
+ default 0
+ export always
+ comment "use AMD K8's memory bank B only to make a 64bit memory system and memory bank A is free, such as Filbert."
+end
+
define CONFIG_VIDEO_MB
default none
export used
comment "Integrated graphics with UMA has dynamic setup"
end
+define CONFIG_GFXUMA
+ default none
+ export used
+ comment "GFX UMA"
+end
+
+define HAVE_MAINBOARD_RESOURCES
+ default 0
+ export always
+ comment "Enable if the mainboard/chipset requires extra entries in the memory map"
+end
+
+define HAVE_LOW_TABLES
+ default 1
+ export always
+ comment "Enable if ACPI, PIRQ, MP tables are supposed to live in the low megabyte"
+end
+
+define HAVE_HIGH_TABLES
+ default 0
+ export always
+ comment "Enable if ACPI, PIRQ, MP tables are supposed to live at top of memory"
+end
+
define CONFIG_SPLASH_GRAPHIC
default 0
export used
# 4 for 1280x1024
end
+define CONFIG_PCIE_CONFIGSPACE_HOLE
+ default 0
+ export always
+ comment "Leave a hole for PCIe config space in the device allocator"
+end
+
###############################################
# Board specific options
###############################################
projects / coreboot.git / blobdiff