spartan3e: reset-button

[hwmod.git] / src / calc_s3e.vhd

diff --git a/src/calc_s3e.vhd b/src/calc_s3e.vhd
index 6ff9ea2cf63e0c3bdc53c066898d5c36ea675efb..db81c548a0d27b47ed294b0b2f2225778c9e8ed4 100644 (file)
--- a/src/calc_s3e.vhd
+++ b/src/calc_s3e.vhd
@@ -10,7 +10,7 @@ use work.ps2_keyboard_controller_pkg.all;
 entity calc is
        port (
                CLK_50MHZ : in std_logic;
-               -- sys_res_n : in std_logic;
+               sys_res : in std_logic;
                -- btnA
                -- TODO: pins
                -- rs232
@@ -31,6 +31,8 @@ entity calc is
 end entity calc;
 
 architecture top of calc is
+       -- reset
+       signal sys_res_n : std_logic;
        -- ps/2
        signal new_data : std_logic;
        signal data : std_logic_vector(7 downto 0);
@@ -40,7 +42,7 @@ architecture top of calc is
        signal command : std_logic_vector(COMMAND_SIZE - 1 downto 0);
        signal command_data : std_logic_vector(3 * COLOR_SIZE + CHAR_SIZE -1 downto 0);
        -- history/display
-       signal d_new_eingabe, d_new_result : std_logic;
+       signal d_new_eingabe, d_new_result, d_new_bs : std_logic;
        signal d_zeile : hzeile;
        signal d_spalte : hspalte;
        signal d_get, d_done : std_logic;
@@ -54,6 +56,7 @@ architecture top of calc is
 begin
        led0 <= '0';
        led1 <= '1';
+       sys_res_n <= not sys_res;
 
        -- vga/ipcore
        textmode_vga_inst : entity work.textmode_vga(struct)
@@ -64,12 +67,12 @@ begin
        )
        port map (
                sys_clk => CLK_50MHZ,
-               sys_res_n => '1',
+               sys_res_n => sys_res_n,
                command => command,
                command_data => command_data,
                free => free,
                vga_clk => vga_clk,
-               vga_res_n => '1',
+               vga_res_n => sys_res_n,
                vsync_n => vsync_n,
                hsync_n => hsync_n,
                r => r,
@@ -88,10 +91,11 @@ begin
        display_inst : entity work.display(beh)
        port map (
                sys_clk => CLK_50MHZ,
-               sys_res_n => '1',
+               sys_res_n => sys_res_n,
                -- history
                d_new_eingabe => d_new_eingabe,
                d_new_result => d_new_result,
+               d_new_bs => d_new_bs,
                d_zeile => d_zeile,
                d_spalte => d_spalte,
                d_get => d_get,
@@ -107,7 +111,7 @@ begin
        history_inst : entity work.history(beh)
        port map (
                sys_clk => CLK_50MHZ,
-               sys_res_n => '1',
+               sys_res_n => sys_res_n,
                -- scanner
                s_char => s_char,
                s_take => s_take,
@@ -116,6 +120,7 @@ begin
                -- display
                d_new_eingabe => d_new_eingabe,
                d_new_result => d_new_result,
+               d_new_bs => d_new_bs,
                d_zeile => d_zeile,
                d_spalte => d_spalte,
                d_get => d_get,
@@ -130,7 +135,7 @@ begin
        scanner_inst : entity work.scanner(beh)
        port map (
                sys_clk => CLK_50MHZ,
-               sys_res_n => '1',
+               sys_res_n => sys_res_n,
                -- ps/2
                new_data => new_data,
                data => data,
@@ -152,7 +157,7 @@ begin
        )
        port map (
                sys_clk => CLK_50MHZ,
-               sys_res_n => '1',
+               sys_res_n => sys_res_n,
                -- scanner
                new_data => new_data,
                data => data,