uint32_t ecx;
uint32_t edx;
};
+
/*
* Generic CPUID function
*/
return result;
}
-
/*
* CPUID functions returning a single datum
*/
: "ebx", "ecx", "edx");
return eax;
}
+
static inline unsigned int cpuid_ebx(unsigned int op)
{
unsigned int eax, ebx;
: "ecx", "edx" );
return ebx;
}
+
static inline unsigned int cpuid_ecx(unsigned int op)
{
unsigned int eax, ecx;
: "ebx", "edx" );
return ecx;
}
+
static inline unsigned int cpuid_edx(unsigned int op)
{
unsigned int eax, edx;
return edx;
}
-
-
#define X86_VENDOR_INVALID 0
#define X86_VENDOR_INTEL 1
#define X86_VENDOR_CYRIX 2
#define X86_VENDOR_SIS 10
#define X86_VENDOR_UNKNOWN 0xff
-#if !defined( __ROMCC__ ) && defined( __GNUC__)
+#if !defined(__PRE_RAM__)
#include <device/device.h>
unsigned vendor;
unsigned device;
};
+
struct cpu_driver {
struct device_operations *ops;
struct cpu_device_id *id_table;
__asm__("andl %%esp,%0; "
"orl %2, %0 "
:"=r" (ci)
- : "0" (~(STACK_SIZE - 1)),
- "r" (STACK_SIZE - sizeof(struct cpu_info))
+ : "0" (~(CONFIG_STACK_SIZE - 1)),
+ "r" (CONFIG_STACK_SIZE - sizeof(struct cpu_info))
);
return ci;
}
return ci->index;
}
+struct cpuinfo_x86 {
+ uint8_t x86; /* CPU family */
+ uint8_t x86_vendor; /* CPU vendor */
+ uint8_t x86_model;
+ uint8_t x86_mask;
+};
+
+static void inline get_fms(struct cpuinfo_x86 *c, uint32_t tfms)
+{
+ c->x86 = (tfms >> 8) & 0xf;
+ c->x86_model = (tfms >> 4) & 0xf;
+ c->x86_mask = tfms & 0xf;
+ if (c->x86 == 0xf)
+ c->x86 += (tfms >> 20) & 0xff;
+ if (c->x86 >= 0x6)
+ c->x86_model += ((tfms >> 16) & 0xF) << 4;
+
+}
#endif
#endif /* ARCH_CPU_H */