uart und extension anbindung

[calu.git] / cpu / src / rs232_rx.vhd

diff --git a/cpu/src/rs232_rx.vhd b/cpu/src/rs232_rx.vhd
index d363ac238176da492cb874239c469d7e4b795e30..8ce22d27e4e5944a2e1bd36d6658ff9ef5083e83 100755 (executable)
--- a/cpu/src/rs232_rx.vhd
+++ b/cpu/src/rs232_rx.vhd
@@ -12,7 +12,6 @@
 library IEEE;
 use IEEE.std_logic_1164.all;
 use IEEE.std_logic_unsigned.all;
-use IEEE.std_logic_arith.all;
 
 use work.common_pkg.all;
 use work.core_pkg.all;
@@ -21,7 +20,8 @@ use work.extension_uart_pkg.all;
 entity rs232_rx is
        generic (
                -- active reset value
-               RESET_VALUE : std_logic
+               RESET_VALUE : std_logic;
+               SYNC_STAGES : integer range 2 to integer'high
                );
 
        port(
@@ -30,11 +30,12 @@ entity rs232_rx is
                sys_res_n : in std_logic;
 
                --Bus
-               bus_rx : in std_logic;
+               bus_rx_unsync : in std_logic;
 
                --To sendlogic
                new_rx_data : out std_logic;
-               rx_data : out uart_data
+               rx_data : out uart_data;
+               bd_rate : in baud_rate_l
        );
 
 end rs232_rx;