deepjit/deepjit_reg: bugfixes

[calu.git] / cpu / src / extension_uart.vhd

diff --git a/cpu/src/extension_uart.vhd b/cpu/src/extension_uart.vhd
index 9a31d1db983100fc132bd90fc526dce5ba2d4cb9..07d6bda2654efe5d679d3231c149e907dcea61c1 100644 (file)
--- a/cpu/src/extension_uart.vhd
+++ b/cpu/src/extension_uart.vhd
@@ -3,6 +3,7 @@ use IEEE.std_logic_1164.all;
 use IEEE.numeric_std.all;
 
 use work.common_pkg.all;
+use work.extension_pkg.all;
 use work.extension_uart_pkg.all;
 
 
@@ -10,7 +11,8 @@ entity extension_uart is
 
        generic (
                        -- active reset value
-                       RESET_VALUE : std_logic
+                       RESET_VALUE : std_logic;
+                       CLK_PER_BAUD : integer
                        );
        port(
                --System inputs
@@ -19,8 +21,10 @@ entity extension_uart is
                -- general extension interface                  
                        ext_reg  : in extmod_rec;
                        data_out : out gp_register_t;
-               -- Input
 
+                       uart_int : out std_logic;
+               -- Input
+                       bus_rx : in std_logic;
                -- Ouput
                        bus_tx : out std_logic
                );