removed 7seg from DT
[calu.git] / cpu / src / execute_stage.vhd
index 925c579ff6526fafbf2cefb44c3758193057aaa0..ff24942bf61e203400c937c584083cfb8cc921df 100644 (file)
@@ -2,20 +2,43 @@ library IEEE;
 use IEEE.std_logic_1164.all;
 use IEEE.numeric_std.all;
 
+use work.common_pkg.all;
+use work.alu_pkg.all;
+use work.extension_pkg.all;
+--use work.gpm_pkg.all;
+
 entity execute_stage is
 
        generic (
                        -- active reset value
-                       RESET_VALUE : std_logic;
+                       RESET_VALUE : std_logic
                        -- active logic value
-                       LOGIC_ACT : std_logic;
+                       --LOGIC_ACT : std_logic;
                        
                        );
        port(
                --System inputs
                        clk : in std_logic;
                        reset : in std_logic;
-                        dec_instr : in dec_op
+                        dec_instr : in dec_op;
+                       regfile_val : in gp_register_t;
+                       reg_we : in std_logic;
+                       reg_addr : in gp_addr_t;
+                       ext_reg  : in extmod_rec;
+            --System output
+            result : out gp_register_t;--reg
+            result_addr : out gp_addr_t;--reg
+            addr : out word_t; --memaddr
+            data : out gp_register_t; --mem data --ureg
+            alu_jump : out std_logic;--reg
+            brpr  : out std_logic;  --reg
+            wr_en : out std_logic;--regop --reg
+            dmem  : out std_logic;--memop
+            dmem_write_en : out std_logic;
+            hword  : out std_logic;
+            byte_s : out std_logic;
+                               
+                       ext_data_out : out gp_register_t
                );
                
 end execute_stage;