erster versuch das ganze mal zu flashen -> es blinkt!!111
[calu.git] / cpu / src / core_top.vhd
index 80a87b5afd8aa74fe295bf7dc561654a0a4876f3..9e0c9967426cb2c39b1c81a74f62ab8be9175553 100644 (file)
@@ -4,28 +4,31 @@ use IEEE.numeric_std.all;
 
 use work.common_pkg.all;
 use work.core_pkg.all;
+use work.extension_pkg.all;
 
 entity core_top is
 
        port(
                --System input pins
                        sys_clk : in std_logic;
-                       sys_res : in std_logic;
-                       result : out gp_register_t;
-                       jump_result : out instruction_addr_t;
-                       reg_wr_data : out gp_register_t
-                       
+--                     result : out gp_register_t;
+--                     reg_wr_data : out gp_register_t
+                 -- uart
+                       bus_tx : out std_logic
                );
 
 end core_top;
 
 architecture behav of core_top is
 
+               signal jump_result : instruction_addr_t;
+               signal sys_res : std_logic;
                signal jump_result_pin : instruction_addr_t;
                signal prediction_result_pin : instruction_addr_t;
                signal branch_prediction_bit_pin : std_logic;
                signal alu_jump_bit_pin : std_logic;
                signal instruction_pin : instruction_word_t;
+               signal prog_cnt_pin : instruction_addr_t;
 
                signal reg_w_addr_pin : std_logic_vector(REG_ADDR_WIDTH-1 downto 0);
                signal reg_wr_data_pin : gp_register_t;
@@ -46,13 +49,10 @@ architecture behav of core_top is
                  signal dmem_wr_en_pin : std_logic;
                  signal hword_pin  : std_logic;
                  signal byte_s_pin : std_logic;
+                                
+                signal gpm_in_pin : extmod_rec;
+                signal gpm_out_pin : gp_register_t;
                 signal nop_pin : std_logic;
-               -- extension signals
-               signal ext_gpmp :  extmod_rec;
-               signal pointer : pointer_count;
-               signal dec_in,p_en : std_logic;
-               signal data_out    : gp_register_t;
-               signal pointer_val : gp_register_t;
 
 
 begin
@@ -76,7 +76,8 @@ begin
                        alu_jump_bit => alu_jump_bit_pin, --: in std_logic;
 
                --Data outputs
-                       instruction => instruction_pin --: out instruction_word_t
+                       instruction => instruction_pin, --: out instruction_word_t
+                       prog_cnt => prog_cnt_pin                
                );
 
        decode_st : decode_stage
@@ -94,6 +95,7 @@ begin
 
                --Data inputs
                        instruction => instruction_pin, --: in instruction_word_t;
+                       prog_cnt => prog_cnt_pin,
                        reg_w_addr => reg_w_addr_pin, --: in std_logic_vector(REG_ADDR_WIDTH-1 downto 0);
                        reg_wr_data => reg_wr_data_pin, --: in gp_register_t;
                        reg_we => reg_we_pin, --: in std_logic;
@@ -107,29 +109,17 @@ begin
 
           exec_st : execute_stage
                 generic map('0')
-                port map(sys_clk, sys_res,to_next_stage, reg_wr_data_pin, reg_we_pin, reg_w_addr_pin, result_pin, result_addr_pin,addr_pin,
-                data_pin, alu_jump_pin,brpr_pin, wr_en_pin, dmem_pin,dmem_wr_en_pin,hword_pin,byte_s_pin);
+                port map(sys_clk, sys_res,to_next_stage, reg_wr_data_pin, reg_we_pin, reg_w_addr_pin, gpm_in_pin, result_pin, result_addr_pin,addr_pin,
+                data_pin, alu_jump_pin,brpr_pin, wr_en_pin, dmem_pin,dmem_wr_en_pin,hword_pin,byte_s_pin, gpm_out_pin);
 
           writeback_st : writeback_stage
                 generic map('0', '1')
                 port map(sys_clk, sys_res, result_pin, result_addr_pin, addr_pin, data_pin, alu_jump_pin, brpr_pin, 
                 wr_en_pin, dmem_pin, dmem_wr_en_pin, hword_pin, byte_s_pin,
-                reg_wr_data_pin, reg_we_pin, reg_w_addr_pin, jump_result_pin, alu_jump_bit_pin);
+                reg_wr_data_pin, reg_we_pin, reg_w_addr_pin, jump_result_pin, alu_jump_bit_pin,bus_tx);
+
 
 
-       gpmp_inst :  extension
-               generic map ('0')
-               port map (
-                       sys_clk,
-                       sys_reset,
-                       ext_gpmp,
-                       pointer,
-                       dec_in,
-                       p_en,
-                       data_out,
-                       pointer_val
-                       
-               );
 
                
 --init : process(all)
@@ -143,10 +133,11 @@ begin
        
 --end process;
        
-       result <= result_pin;
-       nop_pin <= (alu_jump_bit_pin xor brpr_pin);
+--     result <= result_pin;
+       nop_pin <= (alu_jump_bit_pin); -- xor brpr_pin);
 
-       jump_result <= jump_result_pin;
+       jump_result <= prog_cnt_pin; --jump_result_pin;
+       sys_res <= '1';
 
-       reg_wr_data <= reg_wr_data_pin;
+--     reg_wr_data <= reg_wr_data_pin;
 end behav;