call/return

[calu.git] / cpu / sim / testcore.do

diff --git a/cpu/sim/testcore.do b/cpu/sim/testcore.do
index 4f66a620be59e72dfc487b4582785ba444c55340..c77feb02ae23ce5ba6890fdcfc37aec093d2a390 100644 (file)
--- a/cpu/sim/testcore.do
+++ b/cpu/sim/testcore.do
@@ -7,6 +7,7 @@ vcom -work work ../src/r_w_ram_b.vhd
 vcom -work work ../src/r2_w_ram.vhd
 vcom -work work ../src/r2_w_ram_b.vhd
 vcom -work work ../src/common_pkg.vhd
+vcom -work work ../src/extension_pkg.vhd
 vcom -work work ../src/core_pkg.vhd
 vcom -work work ../src/decoder.vhd
 vcom -work work ../src/decoder_b.vhd
@@ -17,7 +18,6 @@ vcom -work work ../src/decode_stage_b.vhd
 
 vcom -work work ../src/alu_pkg.vhd
 vcom -work work ../src/extension_pkg.vhd
-vcom -work work ../src/gpm_pkg.vhd
 
 vcom -work work ../src/exec_op.vhd
 vcom -work work ../src/exec_op/add_op_b.vhd
@@ -28,9 +28,14 @@ vcom -work work ../src/exec_op/shift_op_b.vhd
 
 vcom -work work ../src/alu.vhd
 vcom -work work ../src/alu_b.vhd
+vcom -work work ../src/extension_pkg.vhd
+#vcom -work work ../src/gpm_pkg.vhd
+
+#vcom -work work ../src/gpm.vhd
+#vcom -work work ../src/gpm_b.vhd
 
-vcom -work work ../src/gpm.vhd
-vcom -work work ../src/gpm_b.vhd
+vcom -work work ../src/extension.vhd
+vcom -work work ../src/extension_b.vhd
 
 vcom -work work ../src/execute_stage.vhd
 vcom -work work ../src/execute_stage_b.vhd
@@ -55,9 +60,16 @@ add wave  -radix hexadecimal /pipeline_tb/decode_st/instr_spl
 add wave  -radix hexadecimal /pipeline_tb/decode_st/to_next_stage
 add wave  -radix hexadecimal /pipeline_tb/decode_st/reg1_mem_data
 add wave  -radix hexadecimal /pipeline_tb/decode_st/reg2_mem_data
+add wave  -radix hexadecimal /pipeline_tb/decode_st/rtw_rec_nxt
 add wave  -radix hexadecimal /pipeline_tb/decode_st/rtw_rec
 add wave  -radix hexadecimal /pipeline_tb/decode_st/reg_w_addr
 add wave  -radix hexadecimal /pipeline_tb/decode_st/reg_wr_data
 add wave  -radix hexadecimal /pipeline_tb/decode_st/reg_we
 
+add wave  -radix hexadecimal /pipeline_tb/exec_st/gpmp_inst/psw
+
+add wave  -radix hexadecimal /pipeline_tb/addr_pin
+add wave  -radix hexadecimal /pipeline_tb/data_pin
+add wave  -radix hexadecimal /pipeline_tb/dmem_wr_en_pin
+
 run 5000 ns