writeback_stage: differenzieren zwischen memory und extension geht ( btw wer sich...
[calu.git] / cpu / sim / testcore.do
index 4113490be0ad99a26722e484cb5822f3894fc5b9..9a4c3fe0a01afc76ddc63d3c50b059284f037fd0 100644 (file)
@@ -7,6 +7,15 @@ vcom -work work ../src/r_w_ram_b.vhd
 vcom -work work ../src/r2_w_ram.vhd
 vcom -work work ../src/r2_w_ram_b.vhd
 vcom -work work ../src/common_pkg.vhd
+vcom -work work ../src/extension_pkg.vhd
+vcom -work work ../src/extension_uart_pkg.vhd
+vcom -work work ../src/extension_uart.vhd
+vcom -work work ../src/extension_uart_b.vhd
+vcom -work work ../src/rs232_tx.vhd
+vcom -work work ../src/rs232_tx_arc.vhd
+vcom -work work ../src/rs232_rx.vhd
+vcom -work work ../src/rs232_rx_arc.vhd
+
 vcom -work work ../src/core_pkg.vhd
 vcom -work work ../src/decoder.vhd
 vcom -work work ../src/decoder_b.vhd
@@ -17,7 +26,6 @@ vcom -work work ../src/decode_stage_b.vhd
 
 vcom -work work ../src/alu_pkg.vhd
 vcom -work work ../src/extension_pkg.vhd
-vcom -work work ../src/gpm_pkg.vhd
 
 vcom -work work ../src/exec_op.vhd
 vcom -work work ../src/exec_op/add_op_b.vhd
@@ -28,11 +36,12 @@ vcom -work work ../src/exec_op/shift_op_b.vhd
 
 vcom -work work ../src/alu.vhd
 vcom -work work ../src/alu_b.vhd
+vcom -work work ../src/extension_pkg.vhd
+#vcom -work work ../src/gpm_pkg.vhd
 
-vcom -work work ../src/gpm.vhd
-vcom -work work ../src/gpm_b.vhd
+#vcom -work work ../src/gpm.vhd
+#vcom -work work ../src/gpm_b.vhd
 
-vcom -work work ../src/extension_pkg.vhd
 vcom -work work ../src/extension.vhd
 vcom -work work ../src/extension_b.vhd
 
@@ -65,6 +74,14 @@ add wave  -radix hexadecimal /pipeline_tb/decode_st/reg_w_addr
 add wave  -radix hexadecimal /pipeline_tb/decode_st/reg_wr_data
 add wave  -radix hexadecimal /pipeline_tb/decode_st/reg_we
 
-add wave  -radix hexadecimal /pipeline_tb/exec_st/gpm_inst/psw
+add wave  -radix hexadecimal /pipeline_tb/exec_st/gpmp_inst/psw
+
+add wave  -radix hexadecimal /pipeline_tb/addr_pin
+add wave  -radix hexadecimal /pipeline_tb/data_pin
+add wave  -radix hexadecimal /pipeline_tb/writeback_st/data_ram_read
+add wave  -radix hexadecimal /pipeline_tb/dmem_wr_en_pin
+add wave  -radix hexadecimal /pipeline_tb/writeback_st/dmem_we
+add wave  -radix hexadecimal /pipeline_tb/writeback_st/data_addr
+add wave  -radix decimal     /pipeline_tb/cycle_cnt
 
-run 5000 ns
+run 10000 ns