spartan3e: BRAM gehaxe. lesbarer und wird auch richtig(er) instanziert

[calu.git] / 2_isa / logic.ptex

diff --git a/2_isa/logic.ptex b/2_isa/logic.ptex
index 15420bd01ce463d6ebc6e71b137c8533e9ec9bf2..3d24966a7d827a1d9720f5ad8da8f278f85a3f19 100644 (file)
--- a/2_isa/logic.ptex
+++ b/2_isa/logic.ptex
@@ -25,9 +25,10 @@ ins ('32', 'xorx', 'Xor im 16bit', '4 | 5 | 4 | 16 | 1 | 1 | 1',
 'Conditions | OpCode (01001) | Register Destination| Immediate | H/L | F | D',
 '', '', '', 'not-Negate-3/1111111111111111-4/0-5/1');
 
-ins ('32', 'l\{l,r\}s', 'left/right shift', '4 | 5 | 4 | 4 | 5 | 6 | 1 | 1 | 1 | 1',
+ins ('32', 'shift', 'left/right shift', '4 | 5 | 4 | 4 | 5 | 6 | 1 | 1 | 1 | 1',
 'Conditions | OpCode (01010) | Register Destination|Register A (Source1)| Immediate | - | l/r | A | C | D',
-'',' | Will change if C is set | | ');
+'',' | Will change if C is set | | ', '',
+'lls-left shift-6/0-7/0|lrs-right shift-6/1-7/0|ars-arithmetic right shift-6/1-7/1-8/0');
 
 #plaintext ('\\mbox{}\\\\ \\todo{lls und lrs zusammenfassen $\rightarrow$ ein bit entscheidet fuer shift nach links oder rechts}');