- tmptd->flags |= ACCESS_LE((td->togl) ? OHCI_TD_TOGGLE_1 : OHCI_TD_TOGGLE_0);
-
- printf("tmptd hexdump (before) 0x%08X:\n", tmptd);
- hexdump(tmptd, sizeof(struct general_td));
- printf("tmptd->cbp hexdump (before) 0x%08X:\n", phys_to_virt(ACCESS_LE(tmptd->cbp)));
- hexdump((void*) phys_to_virt(ACCESS_LE(tmptd->cbp)), td->actlen);
-
- sync_after_write(tmptd, sizeof(struct general_td));
- sync_after_write((void*) phys_to_virt(ACCESS_LE(tmptd->cbp)), td->actlen);
-
- struct endpoint_descriptor *dummyconfig = allocate_endpoint();
-
-#define ED_MASK2 ~0 /*((u32)~0x0f) */
-#define ED_MASK ((u32)~0x0f)
- /*dummyconfig->tailp =*/ dummyconfig->headp = ACCESS_LE(virt_to_phys((void*) ((u32)tmptd & ED_MASK)));
-
- dummyconfig->flags |= ACCESS_LE(OHCI_ENDPOINT_LOW_SPEED |
- OHCI_ENDPOINT_SET_DEVICE_ADDRESS(td->devaddress) |
- OHCI_ENDPOINT_SET_ENDPOINT_NUMBER(td->endpoint) |
- OHCI_ENDPOINT_SET_MAX_PACKET_SIZE(td->maxp));
-
- printf("dummyconfig hexdump (before) 0x%08X:\n", dummyconfig);
- hexdump((void*) dummyconfig, 16);
-
- sync_after_write(dummyconfig, 16);
- write32(OHCI0_HC_CTRL_HEAD_ED, virt_to_phys(dummyconfig));
-
- printf("OHCI_CTRL_CLE: 0x%08X || ", read32(OHCI0_HC_CONTROL)&OHCI_CTRL_CLE);
- printf("OHCI_CLF: 0x%08X\n", read32(OHCI0_HC_COMMAND_STATUS)&OHCI_CLF);
- set32(OHCI0_HC_CONTROL, OHCI_CTRL_CLE);
- write32(OHCI0_HC_COMMAND_STATUS, OHCI_CLF);
-
- printf("+++++++++++++++++++++++++++++\n");
- /* spin until the controller is done with the control list */
- u32 current = read32(OHCI0_HC_CTRL_CURRENT_ED);
- printf("current: 0x%08X\n", current);
- while(!current) {
- // udelay(1000000);
- udelay(2);
- current = read32(OHCI0_HC_CTRL_CURRENT_ED);
- // printf("OHCI_CTRL_CLE: 0x%08X || ", read32(OHCI0_HC_CONTROL)&OHCI_CTRL_CLE);
- // printf("OHCI_CLF: 0x%08X\n", read32(OHCI0_HC_COMMAND_STATUS)&OHCI_CLF);
+ dest->flags |= LE(OHCI_TD_SET_DELAY_INTERRUPT(7));
+}
+
+#ifdef _DU_OHCI_F_HALT
+static void dump_address(void *addr, u32 size, const char* str)
+{
+ printf("%s hexdump (%d) @ 0x%08X:\n", str, size, addr);
+ hexdump(addr, size);
+}
+#endif
+
+static struct endpoint_descriptor _edhead;
+struct endpoint_descriptor *edhead = 0;
+void hcdi_fire(u32 reg)
+{
+#ifdef _DU_OHCI_F
+ printf("<^> <^> <^> hcdi_fire(start)\n");
+#endif
+
+ if(edhead == 0)
+ return;
+
+#ifdef _USE_C_Q
+ /* quirk... 11ms seems to be a minimum :O */
+ udelay(11000);
+#endif
+
+ write32(reg+OHCI_HC_CTRL_HEAD_ED, virt_to_phys(edhead));
+
+ /* sync it all */
+ sync_after_write(edhead, sizeof(struct endpoint_descriptor));
+#ifdef _DU_OHCI_F
+ dump_address(edhead, sizeof(struct endpoint_descriptor), "edhead(before)");
+#endif
+
+ struct general_td *x = phys_to_virt(LE(edhead->headp) & OHCI_ENDPOINT_HEAD_MASK);
+ while(virt_to_phys(x)) {
+ sync_after_write(x, sizeof(struct general_td));
+#ifdef _DU_OHCI_F
+ dump_address(x, sizeof(struct general_td), "x(before)");
+#endif
+
+ if(x->buflen > 0) {
+ sync_after_write((void*) phys_to_virt(LE(x->cbp)), x->buflen);
+#ifdef _DU_OHCI_F
+ dump_address((void*) phys_to_virt(LE(x->cbp)), x->buflen, "x->cbp(before)");
+#endif
+ }
+ x = phys_to_virt(LE(x->nexttd));
+ }
+
+ /* trigger control list */
+ set32(reg+OHCI_HC_CONTROL, OHCI_CTRL_CLE);
+ write32(reg+OHCI_HC_COMMAND_STATUS, OHCI_CLF);
+
+ struct general_td *n=0, *prev = 0, *next = 0;
+ /* poll until edhead->headp is null */
+ do {
+ sync_before_read(edhead, sizeof(struct endpoint_descriptor));
+#ifdef _DU_OHCI_F
+ printf("edhead->headp: 0x%08X\n", LE(edhead->headp));
+ udelay(10000);
+#endif
+
+ /* if halted, debug output plz. will break the transfer */
+ if((LE(edhead->headp) & OHCI_ENDPOINT_HALTED)) {
+ n = phys_to_virt(LE(edhead->headp)&~0xf);
+ prev = phys_to_virt((u32)prev);
+#ifdef _DU_OHCI_F_HALT
+ printf("halted!\n");
+#endif
+
+ sync_before_read((void*) n, sizeof(struct general_td));
+#ifdef _DU_OHCI_F_HALT
+ printf("n: 0x%08X\n", n);
+ dump_address(n, sizeof(struct general_td), "n(after)");
+#endif
+ if(n->buflen > 0) {
+ sync_before_read((void*) n->bufaddr, n->buflen);
+#ifdef _DU_OHCI_F_HALT
+ dump_address((void*) n->bufaddr, n->buflen, "n->bufaddr(after)");
+#endif
+ }
+#ifdef _DU_OHCI_F_HALT
+ dbg_td_flag(LE(n->flags));
+#endif
+
+ sync_before_read((void*) prev, sizeof(struct general_td));
+#ifdef _DU_OHCI_F_HALT
+ printf("prev: 0x%08X\n", prev);
+ dump_address(prev, sizeof(struct general_td), "prev(after)");
+#endif
+ if(prev->buflen >0) {
+ sync_before_read((void*) prev->bufaddr, prev->buflen);
+#ifdef _DU_OHCI_F_HALT
+ dump_address((void*) prev->bufaddr, prev->buflen, "prev->bufaddr(after)");
+#endif
+ }
+#ifdef _DU_OHCI_F_HALT
+ dbg_td_flag(LE(prev->flags));
+ printf("halted end!\n");
+#endif
+ return;
+ }
+ prev = (struct general_td*) (LE(edhead->headp)&~0xf);
+ } while(LE(edhead->headp)&~0xf);
+
+ n = phys_to_virt(read32(reg+OHCI_HC_DONE_HEAD) & ~1);
+#ifdef _DU_OHCI_F
+ printf("hc_done_head: 0x%08X\n", read32(reg+OHCI_HC_DONE_HEAD));
+#endif
+
+ prev = 0; next = 0;
+ /* reverse done queue */
+ while(virt_to_phys(n) && edhead->tdcount) {
+ sync_before_read((void*) n, sizeof(struct general_td));
+#ifdef _DU_OHCI_F
+ printf("n: 0x%08X\n", n);
+ printf("next: 0x%08X\n", next);
+ printf("prev: 0x%08X\n", prev);
+#endif
+
+ next = n;
+ n = (struct general_td*) phys_to_virt(LE(n->nexttd));
+ next->nexttd = (u32) prev;
+ prev = next;
+
+ edhead->tdcount--;