oh, hello bluetooth dongle :D

do the whole thing more generic ...

diff --git a/hollywood.h b/hollywood.h
index a20f3e0a26551164e7e60a34e29c176e48142c27..9133116e8f1e3ea3326fefc6bbcb5236445b298a 100644 (file)
--- a/hollywood.h
+++ b/hollywood.h
@@ -140,70 +140,40 @@ Copyright (C) 2008, 2009  John Kelley <wiidev@kelley.ca>
 #define                SDHC_REG_BASE           0xd070000
 
 /* OHCI0 Registers */
-
 #define        OHCI0_REG_BASE          0xd050000
 
-#define        OHCI0_HC_REVISION                       (OHCI0_REG_BASE + 0x00)
-#define        OHCI0_HC_CONTROL                        (OHCI0_REG_BASE + 0x04)
-#define        OHCI0_HC_COMMAND_STATUS         (OHCI0_REG_BASE + 0x08)
-#define        OHCI0_HC_INT_STATUS             (OHCI0_REG_BASE + 0x0C)
-
-#define        OHCI0_HC_INT_ENABLE             (OHCI0_REG_BASE + 0x10)
-#define        OHCI0_HC_INT_DISABLE            (OHCI0_REG_BASE + 0x14)
-#define        OHCI0_HC_HCCA                           (OHCI0_REG_BASE + 0x18)
-#define        OHCI0_HC_PERIOD_CURRENT_ED      (OHCI0_REG_BASE + 0x1C)
+/* OHCI1 Registers */
+#define        OHCI1_REG_BASE          0xd060000
 
-#define        OHCI0_HC_CTRL_HEAD_ED           (OHCI0_REG_BASE + 0x20)
-#define        OHCI0_HC_CTRL_CURRENT_ED        (OHCI0_REG_BASE + 0x24)
-#define        OHCI0_HC_BULK_HEAD_ED           (OHCI0_REG_BASE + 0x28)
-#define        OHCI0_HC_BULK_CURRENT_ED        (OHCI0_REG_BASE + 0x2C)
+#define        OHCI_HC_REVISION                        0x00
+#define        OHCI_HC_CONTROL                         0x04
+#define        OHCI_HC_COMMAND_STATUS          0x08
+#define        OHCI_HC_INT_STATUS                      0x0C
 
-#define        OHCI0_HC_DONE_HEAD                      (OHCI0_REG_BASE + 0x30)
-#define        OHCI0_HC_FM_INTERVAL            (OHCI0_REG_BASE + 0x34)
-#define        OHCI0_HC_FM_REMAINING           (OHCI0_REG_BASE + 0x38)
-#define        OHCI0_HC_FM_NUMBER                      (OHCI0_REG_BASE + 0x3C)
+#define        OHCI_HC_INT_ENABLE                      0x10
+#define        OHCI_HC_INT_DISABLE             0x14
+#define        OHCI_HC_HCCA                            0x18
+#define        OHCI_HC_PERIOD_CURRENT_ED       0x1C
 
-#define        OHCI0_HC_PERIODIC_START         (OHCI0_REG_BASE + 0x40)
-#define        OHCI0_HC_LS_THRESHOLD           (OHCI0_REG_BASE + 0x44)
-#define        OHCI0_HC_RH_DESCRIPTOR_A        (OHCI0_REG_BASE + 0x48)
-#define        OHCI0_HC_RH_DESCRIPTOR_B        (OHCI0_REG_BASE + 0x4C)
+#define        OHCI_HC_CTRL_HEAD_ED            0x20
+#define        OHCI_HC_CTRL_CURRENT_ED         0x24
+#define        OHCI_HC_BULK_HEAD_ED            0x28
+#define        OHCI_HC_BULK_CURRENT_ED         0x2C
 
-#define        OHCI0_HC_RH_STATUS                      (OHCI0_REG_BASE + 0x50)
-#define        OHCI0_HC_RH_PORT_STATUS_1       (OHCI0_REG_BASE + 0x54)
-#define        OHCI0_HC_RH_PORT_STATUS_2       (OHCI0_REG_BASE + 0x58)
+#define        OHCI_HC_DONE_HEAD                       0x30
+#define        OHCI_HC_FM_INTERVAL             0x34
+#define        OHCI_HC_FM_REMAINING            0x38
+#define        OHCI_HC_FM_NUMBER                       0x3C
 
-/* OHCI1 Registers */
+#define        OHCI_HC_PERIODIC_START          0x40
+#define        OHCI_HC_LS_THRESHOLD            0x44
+#define        OHCI_HC_RH_DESCRIPTOR_A         0x48
+#define        OHCI_HC_RH_DESCRIPTOR_B         0x4C
 
-#define        OHCI1_REG_BASE          0xd060000
+#define        OHCI_HC_RH_STATUS                       0x50
+#define        OHCI_HC_RH_PORT_STATUS_1        0x54
+#define        OHCI_HC_RH_PORT_STATUS_2        0x58
 
-#define        OHCI1_HC_REVISION                       (OHCI1_REG_BASE + 0x00)
-#define        OHCI1_HC_CONTROL                        (OHCI1_REG_BASE + 0x04)
-#define        OHCI1_HC_COMMAND_STATUS         (OHCI1_REG_BASE + 0x08)
-#define        OHCI1_HC_INT_STATUS             (OHCI1_REG_BASE + 0x0C)
-
-#define        OHCI1_HC_INT_ENABLE             (OHCI1_REG_BASE + 0x10)
-#define        OHCI1_HC_INT_DISABLE            (OHCI1_REG_BASE + 0x14)
-#define        OHCI1_HC_HCCA                           (OHCI1_REG_BASE + 0x18)
-#define        OHCI1_HC_PERIOD_CURRENT_ED      (OHCI1_REG_BASE + 0x1C)
-
-#define        OHCI1_HC_CTRL_HEAD_ED           (OHCI1_REG_BASE + 0x20)
-#define        OHCI1_HC_CTRL_CURRENT_ED        (OHCI1_REG_BASE + 0x24)
-#define        OHCI1_HC_BULK_HEAD_ED           (OHCI1_REG_BASE + 0x28)
-#define        OHCI1_HC_BULK_CURRENT_ED        (OHCI1_REG_BASE + 0x2C)
-
-#define        OHCI1_HC_DONE_HEAD                      (OHCI1_REG_BASE + 0x30)
-#define        OHCI1_HC_FM_INTERVAL            (OHCI1_REG_BASE + 0x34)
-#define        OHCI1_HC_FM_REMAINING           (OHCI1_REG_BASE + 0x38)
-#define        OHCI1_HC_FM_NUMBER                      (OHCI1_REG_BASE + 0x3C)
-
-#define        OHCI1_HC_PERIODIC_START         (OHCI1_REG_BASE + 0x40)
-#define        OHCI1_HC_LS_THRESHOLD           (OHCI1_REG_BASE + 0x44)
-#define        OHCI1_HC_RH_DESCRIPTOR_A        (OHCI1_REG_BASE + 0x48)
-#define        OHCI1_HC_RH_DESCRIPTOR_B        (OHCI1_REG_BASE + 0x4C)
-
-#define        OHCI1_HC_RH_STATUS                      (OHCI1_REG_BASE + 0x50)
-#define        OHCI1_HC_RH_PORT_STATUS_1       (OHCI1_REG_BASE + 0x54)
-#define        OHCI1_HC_RH_PORT_STATUS_2       (OHCI1_REG_BASE + 0x58)
 
 /* EHCI Registers */
 #define        EHCI_REG_BASE           0xd040000

diff --git a/irq.c b/irq.c
index 31daa980e5ac3d7d6547d38d3b97aa56f7ae96dd..5b0241c4087aada266fbf5ac489ec0d16c364401 100644 (file)
--- a/irq.c
+++ b/irq.c
@@ -114,11 +114,11 @@ void irq_handler(void)
                        //sdhc_irq();
                }
                if (hw_flags & IRQF_OHCI0) {
-                       hcdi_irq();
+                       hcdi_irq(OHCI0_REG_BASE);
                        write32(HW_PPCIRQFLAG, IRQF_OHCI0);
                }
                if (hw_flags & IRQF_OHCI1) {
-                       //TODO: ohci1_irq();
+                       hcdi_irq(OHCI1_REG_BASE);
                        write32(HW_PPCIRQFLAG, IRQF_OHCI1);
                }
 

diff --git a/main.c b/main.c
index 18cc42220e94461b00249626e61743d4e607d6ea..e9dc2079128a0a34cba289735a14b2d3967a224d 100644 (file)
--- a/main.c
+++ b/main.c
@@ -26,6 +26,7 @@ Copyright (C) 2009              John Kelley <wiidev@kelley.ca>
 #include "console.h"
 #include "irq.h"
 #include "usb/core/core.h"
+#include "hollywood.h"
 
 #define MINIMUM_MINI_VERSION 0x00010001
 
@@ -113,7 +114,8 @@ int main(void)
                        ; // better ideas welcome!
        }
 
-       usb_init();
+       usb_init(OHCI0_REG_BASE);
+       usb_init(OHCI1_REG_BASE);
 
        /*
     print_str_noscroll(112, 112, "ohai, world!\n");

diff --git a/usb/core/core.c b/usb/core/core.c
index 2028251f5726d68feb5ae3d84a61bef6b1de8f0a..34a853798119dc19125ae54804a8514988b4551d 100644 (file)
--- a/usb/core/core.c
+++ b/usb/core/core.c
@@ -45,12 +45,12 @@
 /**
  * Initialize USB stack.
  */
-void usb_init()
+void usb_init(u32 reg)
 {
        core.drivers = list_create();
        core.devices = list_create();
        core.nextaddress = 1;
-       hcdi_init();
+       hcdi_init(reg);
 }
 
 /**
@@ -86,7 +86,7 @@ void usb_periodic()
  * for the core. usb_add_device expected that
  * the device answers to address zero.
  */
-struct usb_device *usb_add_device(u8 lowspeed)
+struct usb_device *usb_add_device(u8 lowspeed, u32 reg)
 {
        struct usb_device *dev = (struct usb_device *) malloc(sizeof(struct usb_device));
        dev->conf = (struct usb_conf *) malloc(sizeof(struct usb_conf));
@@ -96,6 +96,7 @@ struct usb_device *usb_add_device(u8 lowspeed)
         * 64 bytes for fullspeed
         */
        dev->bMaxPacketSize0 = lowspeed ? 8 : 64;
+       dev->ohci = reg;
 
        dev->epSize[0] = 64;
        dev->epSize[1] = 64;
@@ -362,7 +363,7 @@ u16 usb_submit_irp(struct usb_irp *irp)
                togl = togl ? 0 : 1;
 
                /**** send token ****/
-               hcdi_enqueue(td);
+               hcdi_enqueue(td, irp->dev->ohci);
 
                /***************** Data Stage ***********************/
                /**
@@ -420,7 +421,7 @@ u16 usb_submit_irp(struct usb_irp *irp)
                                }
 
                                /**** send token ****/
-                               hcdi_enqueue(td);
+                               hcdi_enqueue(td, irp->dev->ohci);
 
                                /* pruefe ob noch weitere Pakete vom Device abgeholt werden muessen */
                                restlength = restlength - irp->epsize;
@@ -447,7 +448,7 @@ u16 usb_submit_irp(struct usb_irp *irp)
                        td->pid = USB_PID_IN;
                }
                /**** send token ****/
-               hcdi_enqueue(td);
+               hcdi_enqueue(td, irp->dev->ohci);
                free(td);
                break;
 
@@ -489,7 +490,7 @@ u16 usb_submit_irp(struct usb_irp *irp)
                        else
                                togl = 0;
                                /**** send token ****/
-                       hcdi_enqueue(td);
+                       hcdi_enqueue(td, irp->dev->ohci);
                        free(td);
                }
                /* next togl */
@@ -500,7 +501,7 @@ u16 usb_submit_irp(struct usb_irp *irp)
 
                break;
        }
-       hcdi_fire();
+       hcdi_fire(irp->dev->ohci);
 
        return 1;
 }

diff --git a/usb/core/core.h b/usb/core/core.h
index b906bf2c6463b60e1831c49443e726db8b3e36e6..4aeb042884394689fc42e9e15185f9d842cb469a 100644 (file)
--- a/usb/core/core.h
+++ b/usb/core/core.h
@@ -49,6 +49,7 @@ inline static void wait_ms(int ms)
 struct usb_device {
        u8 address;
        u8 fullspeed;
+       u32 ohci;
 
        /* device descriptor */
        u8 bLength;
@@ -188,12 +189,12 @@ struct usb_core {
        struct list *devices;
 } core;
 
-void usb_init();
+void usb_init(u32 reg);
 void usb_periodic();
 u8 usb_next_address();
 
 
-struct usb_device *usb_add_device(u8 lowspeed);
+struct usb_device *usb_add_device(u8 lowspeed, u32 reg);
 u8 usb_remove_device(struct usb_device *dev);
 u8 usb_register_driver(struct usb_driver *driver);
 void usb_probe_driver();

diff --git a/usb/host/host.h b/usb/host/host.h
index ce341f696c748b53e7d4c626af9d4c23be12e346..22e5db7d0cf1506b7b8a753211cb7a4b57c2b8f4 100644 (file)
--- a/usb/host/host.h
+++ b/usb/host/host.h
@@ -40,7 +40,7 @@
 /**
  * IRQ from host controller.
  */
-void hcdi_irq();
+void hcdi_irq(u32 reg);
 
 
 /**
@@ -50,12 +50,12 @@ void hcdi_init();
 /**
  * Enqueue a transfer descriptor.
  */
-u8 hcdi_enqueue(const struct usb_transfer_descriptor *td);
+u8 hcdi_enqueue(const struct usb_transfer_descriptor *td, u32 reg);
 /**
  * Remove an transfer descriptor from transfer queue.
  */
-u8 hcdi_dequeue(struct usb_transfer_descriptor *td);
+u8 hcdi_dequeue(struct usb_transfer_descriptor *td, u32 reg);
 
-void hcdi_fire(void);
+void hcdi_fire(u32 reg);
 
 #endif /* __HOST_H */

diff --git a/usb/host/ohci.c b/usb/host/ohci.c
index db83e0f90e5f55609e9ae7edc82f147626c81d5a..a1520d02d61481ba7ad251378924c46c9ebf1d9e 100644 (file)
--- a/usb/host/ohci.c
+++ b/usb/host/ohci.c
@@ -32,11 +32,12 @@ Copyright (C) 2009     Sebastian Falbesoner <sebastian.falbesoner@gmail.com>
                           (((dword) & 0x000000FF) << 24) )
 
 static struct general_td *allocate_general_td();
-static void dbg_op_state();
-static void configure_ports(u8 from_init);
-static void setup_port(u32 reg, u8 from_init);
+static void dbg_op_state(u32 reg);
+static void configure_ports(u8 from_init, u32 reg);
+static void setup_port(u32 ohci, u32 reg, u8 from_init);
 
 static struct ohci_hcca hcca_oh0;
+static struct ohci_hcca hcca_oh1;
 
 
 static struct general_td *allocate_general_td()
@@ -51,9 +52,9 @@ static struct general_td *allocate_general_td()
 }
 
 
-static void dbg_op_state() 
+static void dbg_op_state(u32 reg) 
 {
-       switch (read32(OHCI0_HC_CONTROL) & OHCI_CTRL_HCFS) {
+       switch (read32(reg+OHCI_HC_CONTROL) & OHCI_CTRL_HCFS) {
                case OHCI_USB_SUSPEND:
                        printf("ohci-- OHCI_USB_SUSPEND\n");
                        break;
@@ -153,7 +154,7 @@ static void dump_address(void *addr, u32 size, const char* str)
 
 static struct endpoint_descriptor _edhead;
 struct endpoint_descriptor *edhead = 0;
-void hcdi_fire()
+void hcdi_fire(u32 reg)
 {
 #ifdef _DU_OHCI_F
        printf("<^>  <^>  <^> hcdi_fire(start)\n");
@@ -167,7 +168,7 @@ void hcdi_fire()
        udelay(11000);
 #endif
 
-       write32(OHCI0_HC_CTRL_HEAD_ED, virt_to_phys(edhead));
+       write32(reg+OHCI_HC_CTRL_HEAD_ED, virt_to_phys(edhead));
 
        /* sync it all */
        sync_after_write(edhead, sizeof(struct endpoint_descriptor));
@@ -192,8 +193,8 @@ void hcdi_fire()
        }
 
        /* trigger control list */
-       set32(OHCI0_HC_CONTROL, OHCI_CTRL_CLE);
-       write32(OHCI0_HC_COMMAND_STATUS, OHCI_CLF);
+       set32(reg+OHCI_HC_CONTROL, OHCI_CTRL_CLE);
+       write32(reg+OHCI_HC_COMMAND_STATUS, OHCI_CLF);
 
        struct general_td *n=0, *prev = 0, *next = 0;
        /* poll until edhead->headp is null */
@@ -247,9 +248,9 @@ void hcdi_fire()
                prev = (struct general_td*) (LE(edhead->headp)&~0xf);
        } while(LE(edhead->headp)&~0xf);
 
-       n = phys_to_virt(read32(OHCI0_HC_DONE_HEAD) & ~1);
+       n = phys_to_virt(read32(reg+OHCI_HC_DONE_HEAD) & ~1);
 #ifdef _DU_OHCI_F
-       printf("hc_done_head: 0x%08X\n", read32(OHCI0_HC_DONE_HEAD));
+       printf("hc_done_head: 0x%08X\n", read32(reg+OHCI_HC_DONE_HEAD));
 #endif
 
        prev = 0; next = 0;
@@ -290,10 +291,15 @@ void hcdi_fire()
                free(prev);
        }
 
-       hcca_oh0.done_head = 0;
-       sync_after_write(&hcca_oh0, sizeof(hcca_oh0));
+       if(reg == OHCI0_REG_BASE) {
+               hcca_oh0.done_head = 0;
+               sync_after_write(&hcca_oh0, sizeof(hcca_oh0));
+       } else if (reg == OHCI1_REG_BASE) {
+               hcca_oh1.done_head = 0;
+               sync_after_write(&hcca_oh1, sizeof(hcca_oh1));
+       }
 
-       write32(OHCI0_HC_CONTROL, read32(OHCI0_HC_CONTROL)&~OHCI_CTRL_CLE);
+       write32(reg+OHCI_HC_CONTROL, read32(reg+OHCI_HC_CONTROL)&~OHCI_CTRL_CLE);
 
        edhead = 0;
 
@@ -305,7 +311,7 @@ void hcdi_fire()
 /**
  * Enqueue a transfer descriptor.
  */
-u8 hcdi_enqueue(const struct usb_transfer_descriptor *td) {
+u8 hcdi_enqueue(const struct usb_transfer_descriptor *td, u32 reg) {
 #ifdef _DU_OHCI_Q
        printf("*()*()*()*()*()*()*() hcdi_enqueue(start)\n");
 #endif
@@ -358,22 +364,22 @@ u8 hcdi_enqueue(const struct usb_transfer_descriptor *td) {
 /**
  * Remove an transfer descriptor from transfer queue.
  */
-u8 hcdi_dequeue(struct usb_transfer_descriptor *td) {
+u8 hcdi_dequeue(struct usb_transfer_descriptor *td, u32 reg) {
        return 0;
 }
 
-void hcdi_init() 
+void hcdi_init(u32 reg)
 {
        printf("ohci-- init\n");
-       dbg_op_state();
+       dbg_op_state(reg);
 
        /* disable hc interrupts */
-       set32(OHCI0_HC_INT_DISABLE, OHCI_INTR_MIE);
+       set32(reg+OHCI_HC_INT_DISABLE, OHCI_INTR_MIE);
 
        /* save fmInterval and calculate FSMPS */
 #define FSMP(fi) (0x7fff & ((6 * ((fi) - 210)) / 7))
 #define FI 0x2edf /* 12000 bits per frame (-1) */
-       u32 fmint = read32(OHCI0_HC_FM_INTERVAL) & 0x3fff;
+       u32 fmint = read32(reg+OHCI_HC_FM_INTERVAL) & 0x3fff;
        if(fmint != FI)
                printf("ohci-- fminterval delta: %d\n", fmint - FI);
        fmint |= FSMP (fmint) << 16;
@@ -382,11 +388,11 @@ void hcdi_init()
        set32(EHCI_CTL, EHCI_CTL_OH0INTE | EHCI_CTL_OH1INTE | 0xe0000);
 
        /* reset HC */
-       write32(OHCI0_HC_COMMAND_STATUS, OHCI_HCR);
+       write32(reg+OHCI_HC_COMMAND_STATUS, OHCI_HCR);
 
        /* wait max. 30us */
        u32 ts = 30;
-       while ((read32(OHCI0_HC_COMMAND_STATUS) & OHCI_HCR) != 0) {
+       while ((read32(reg+OHCI_HC_COMMAND_STATUS) & OHCI_HCR) != 0) {
                 if(--ts == 0) {
                        printf("ohci-- FAILED");
                        return;
@@ -402,63 +408,69 @@ void hcdi_init()
 
        /* Tell the controller where the control and bulk lists are
         * The lists are empty now. */
-       write32(OHCI0_HC_CTRL_HEAD_ED, 0);
-       write32(OHCI0_HC_BULK_HEAD_ED, 0);
+       write32(reg+OHCI_HC_CTRL_HEAD_ED, 0);
+       write32(reg+OHCI_HC_BULK_HEAD_ED, 0);
 
        /* set hcca adress */
-       sync_after_write(&hcca_oh0, 256);
-       write32(OHCI0_HC_HCCA, virt_to_phys(&hcca_oh0));
+       if(reg == OHCI0_REG_BASE) {
+               sync_after_write(&hcca_oh0, 256);
+               write32(reg+OHCI_HC_HCCA, virt_to_phys(&hcca_oh0));
+       } else {
+               sync_after_write(&hcca_oh1, 256);
+               write32(reg+OHCI_HC_HCCA, virt_to_phys(&hcca_oh1));
+       }
 
        /* set periodicstart */
 #define FIT (1<<31)
-       u32 fmInterval = read32(OHCI0_HC_FM_INTERVAL) &0x3fff;
-       u32 fit = read32(OHCI0_HC_FM_INTERVAL) & FIT;
+       u32 fmInterval = read32(reg+OHCI_HC_FM_INTERVAL) &0x3fff;
+       u32 fit = read32(reg+OHCI_HC_FM_INTERVAL) & FIT;
 
-       write32(OHCI0_HC_FM_INTERVAL, fmint | (fit ^ FIT));
-       write32(OHCI0_HC_PERIODIC_START, ((9*fmInterval)/10)&0x3fff);
+       write32(reg+OHCI_HC_FM_INTERVAL, fmint | (fit ^ FIT));
+       write32(reg+OHCI_HC_PERIODIC_START, ((9*fmInterval)/10)&0x3fff);
 
        /* testing bla */
-       if ((read32(OHCI0_HC_FM_INTERVAL) & 0x3fff0000) == 0 || !read32(OHCI0_HC_PERIODIC_START)) {
+       if ((read32(reg+OHCI_HC_FM_INTERVAL) & 0x3fff0000) == 0 || !read32(reg+OHCI_HC_PERIODIC_START)) {
                printf("ohci-- w00t, fail!! see ohci-hcd.c:669\n");
        }
        
        /* start HC operations */
-       write32(OHCI0_HC_CONTROL, OHCI_CONTROL_INIT | OHCI_USB_OPER);
+       write32(reg+OHCI_HC_CONTROL, OHCI_CONTROL_INIT | OHCI_USB_OPER);
 
        /* wake on ConnectStatusChange, matching external hubs */
-       write32(OHCI0_HC_RH_STATUS, /*RH_HS_DRWE |*/ RH_HS_LPSC);
+       write32(reg+OHCI_HC_RH_STATUS, /*RH_HS_DRWE |*/ RH_HS_LPSC);
 
        /* Choose the interrupts we care about now, others later on demand */
-       write32(OHCI0_HC_INT_STATUS, ~0);
-       write32(OHCI0_HC_INT_ENABLE, OHCI_INTR_INIT);
+       write32(reg+OHCI_HC_INT_STATUS, ~0);
+       write32(reg+OHCI_HC_INT_ENABLE, OHCI_INTR_INIT);
 
        //wtf?
-       wait_ms ((read32(OHCI0_HC_RH_DESCRIPTOR_A) >> 23) & 0x1fe);
+       wait_ms ((read32(reg+OHCI_HC_RH_DESCRIPTOR_A) >> 23) & 0x1fe);
 
-       configure_ports((u8)1);
+       configure_ports((u8)1, reg);
        irq_restore(cookie);
 
-       dbg_op_state();
+       dbg_op_state(reg);
 }
 
-static void configure_ports(u8 from_init)
+static void configure_ports(u8 from_init, u32 reg)
 {
 #ifdef _DU_OHCI_RH
-       printf("OHCI0_HC_RH_DESCRIPTOR_A:\t0x%08X\n", read32(OHCI0_HC_RH_DESCRIPTOR_A));
-       printf("OHCI0_HC_RH_DESCRIPTOR_B:\t0x%08X\n", read32(OHCI0_HC_RH_DESCRIPTOR_B));
-       printf("OHCI0_HC_RH_STATUS:\t\t0x%08X\n", read32(OHCI0_HC_RH_STATUS));
-       printf("OHCI0_HC_RH_PORT_STATUS_1:\t0x%08X\n", read32(OHCI0_HC_RH_PORT_STATUS_1));
-       printf("OHCI0_HC_RH_PORT_STATUS_2:\t0x%08X\n", read32(OHCI0_HC_RH_PORT_STATUS_2));
+       printf("=== Roothub @ %s ===\n", reg == OHCI0_REG_BASE ? "OHCI0" : "OHCI1");
+       printf("OHCI_HC_RH_DESCRIPTOR_A:\t0x%08X\n", read32(reg+OHCI_HC_RH_DESCRIPTOR_A));
+       printf("OHCI_HC_RH_DESCRIPTOR_B:\t0x%08X\n", read32(reg+OHCI_HC_RH_DESCRIPTOR_B));
+       printf("OHCI_HC_RH_STATUS:\t\t0x%08X\n", read32(reg+OHCI_HC_RH_STATUS));
+       printf("OHCI_HC_RH_PORT_STATUS_1:\t0x%08X\n", read32(reg+OHCI_HC_RH_PORT_STATUS_1));
+       printf("OHCI_HC_RH_PORT_STATUS_2:\t0x%08X\n", read32(reg+OHCI_HC_RH_PORT_STATUS_2));
 #endif
 
-       setup_port(OHCI0_HC_RH_PORT_STATUS_1, from_init);
-       setup_port(OHCI0_HC_RH_PORT_STATUS_2, from_init);
+       setup_port(reg, reg+OHCI_HC_RH_PORT_STATUS_1, from_init);
+       setup_port(reg, reg+OHCI_HC_RH_PORT_STATUS_2, from_init);
 #ifdef _DU_OHCI_RH
        printf("configure_ports done\n");
 #endif
 }
 
-static void setup_port(u32 reg, u8 from_init)
+static void setup_port(u32 ohci, u32 reg, u8 from_init)
 {
        u32 port = read32(reg);
        if((port & RH_PS_CCS) && ((port & RH_PS_CSC) || from_init)) {
@@ -484,14 +496,14 @@ static void setup_port(u32 reg, u8 from_init)
 #endif
 
                /* returns usb_device struct */
-               (void) usb_add_device((read32(reg) & RH_PS_LSDA) >> 8);
+               (void) usb_add_device((read32(reg) & RH_PS_LSDA) >> 8, ohci);
        }
 }
 
-void hcdi_irq()
+void hcdi_irq(u32 reg)
 {
        /* read interrupt status */
-       u32 flags = read32(OHCI0_HC_INT_STATUS);
+       u32 flags = read32(reg+OHCI_HC_INT_STATUS);
 
        /* when all bits are set to 1 some problem occured */
        if (flags == 0xffffffff) {
@@ -500,7 +512,7 @@ void hcdi_irq()
        }
 
        /* only care about interrupts that are enabled */
-       flags &= read32(OHCI0_HC_INT_ENABLE);
+       flags &= read32(reg+OHCI_HC_INT_ENABLE);
 
        /* nothing to do? */
        if (flags == 0) {
@@ -520,13 +532,13 @@ void hcdi_irq()
        if (flags & OHCI_INTR_RHSC) {
                printf("RootHubStatusChange\n");
                /* TODO: set some next_statechange variable... */
-               configure_ports(0);
-               write32(OHCI0_HC_INT_STATUS, OHCI_INTR_RD | OHCI_INTR_RHSC);
+               configure_ports(0, reg);
+               write32(reg+OHCI_HC_INT_STATUS, OHCI_INTR_RD | OHCI_INTR_RHSC);
        }
        /* ResumeDetected */
        else if (flags & OHCI_INTR_RD) {
                printf("ResumeDetected\n");
-               write32(OHCI0_HC_INT_STATUS, OHCI_INTR_RD);
+               write32(reg+OHCI_HC_INT_STATUS, OHCI_INTR_RD);
                /* TODO: figure out what the linux kernel does here... */
        }
 
@@ -550,13 +562,18 @@ void hcdi_irq()
 
 #define HC_IS_RUNNING() 1 /* dirty, i know... just a temporary solution */
        if (HC_IS_RUNNING()) {
-               write32(OHCI0_HC_INT_STATUS, flags);
-               write32(OHCI0_HC_INT_ENABLE, OHCI_INTR_MIE);
+               write32(reg+OHCI_HC_INT_STATUS, flags);
+               write32(reg+OHCI_HC_INT_ENABLE, OHCI_INTR_MIE);
        }
 }
 
-void show_frame_no()
+void show_frame_no(u32 reg)
 {
-       sync_before_read(&hcca_oh0, 256);
-       printf("***** frame_no: %d *****\n", LE(hcca_oh0.frame_no));
+       if(reg == OHCI0_REG_BASE) {
+               sync_before_read(&hcca_oh0, 256);
+               printf("***** frame_no: %d *****\n", LE(hcca_oh0.frame_no));
+       } else if (reg == OHCI1_REG_BASE) {
+               sync_before_read(&hcca_oh1, 256);
+               printf("***** frame_no: %d *****\n", LE(hcca_oh1.frame_no));
+       }
 }