- RC0 | (0xa << 3) | 0, RC0 | (0xa << 3) | 2,
- RC0 | (0xa << 3) | 4, RC0 | (0xa << 3) | 6,
- RC0 | (0xa << 3) | 1, RC0 | (0xa << 3) | 3,
- RC0 | (0xa << 3) | 5, RC0 | (0xa << 3) | 7,
-#if CONFIG_MAX_PHYSICAL_CPUS > 1
- RC1 | (0xa << 3) | 0, RC1 | (0xa << 3) | 2,
- RC1 | (0xa << 3) | 4, RC1 | (0xa << 3) | 6,
- RC1 | (0xa << 3) | 1, RC1 | (0xa << 3) | 3,
- RC1 | (0xa << 3) | 5, RC1 | (0xa << 3) | 7,
-#endif
+ // Node 0
+ RC0 | DIMM0, RC0 | DIMM2,
+ RC0 | DIMM4, RC0 | DIMM6,
+ RC0 | DIMM1, RC0 | DIMM3,
+ RC0 | DIMM5, RC0 | DIMM7,
+ // Node 1
+ RC1 | DIMM0, RC1 | DIMM2,
+ RC1 | DIMM4, RC1 | DIMM6,
+ RC1 | DIMM1, RC1 | DIMM3,
+ RC1 | DIMM5, RC1 | DIMM7,