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run uart_init() from console_init, just like the other console initialization functions.
[coreboot.git]
/
src
/
mainboard
/
asus
/
p2b-d
/
romstage.c
diff --git
a/src/mainboard/asus/p2b-d/romstage.c
b/src/mainboard/asus/p2b-d/romstage.c
index a4a37c942a42cfa4e687b9aac68b4a11fc897432..4d10862a39ea637dc747919315eddf05b1cd5ffb 100644
(file)
--- a/
src/mainboard/asus/p2b-d/romstage.c
+++ b/
src/mainboard/asus/p2b-d/romstage.c
@@
-18,9
+18,6
@@
* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
*/
* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
*/
-#define ASSEMBLY 1
-
-
#include <stdint.h>
#include <device/pci_def.h>
#include <arch/io.h>
#include <stdint.h>
#include <device/pci_def.h>
#include <arch/io.h>
@@
-28,49
+25,31
@@
#include <arch/romcc_io.h>
#include <arch/hlt.h>
#include <stdlib.h>
#include <arch/romcc_io.h>
#include <arch/hlt.h>
#include <stdlib.h>
-#include <cpu/x86/lapic.h>
-#include "pc80/serial.c"
-#include "arch/i386/lib/console.c"
-#include "lib/ramtest.c"
-#include "southbridge/intel/i82371eb/i82371eb_enable_rom.c"
-#include "southbridge/intel/i82371eb/i82371eb_early_smbus.c"
+#include <console/console.h>
+#include "southbridge/intel/i82371eb/i82371eb.h"
#include "northbridge/intel/i440bx/raminit.h"
#include "northbridge/intel/i440bx/raminit.h"
-#include "lib/debug.c"
#include "pc80/udelay_io.c"
#include "lib/delay.c"
#include "pc80/udelay_io.c"
#include "lib/delay.c"
-#include "cpu/x86/mtrr/earlymtrr.c"
#include "cpu/x86/bist.h"
#include "cpu/x86/bist.h"
-#include "superio/winbond/w83977tf/w83977tf_early_serial.c"
+#include "superio/winbond/w83977tf/early_serial.c"
+#include <lib.h>
#define SERIAL_DEV PNP_DEV(0x3f0, W83977TF_SP1)
#define SERIAL_DEV PNP_DEV(0x3f0, W83977TF_SP1)
-
static inline
int spd_read_byte(unsigned int device, unsigned int address)
+int spd_read_byte(unsigned int device, unsigned int address)
{
return smbus_read_byte(device, address);
}
{
return smbus_read_byte(device, address);
}
-#include "northbridge/intel/i440bx/raminit.c"
-#include "northbridge/intel/i440bx/debug.c"
-
-static void main(unsigned long bist)
+void main(unsigned long bist)
{
{
- if (bist == 0) {
- early_mtrr_init();
- enable_lapic(); /* FIXME? */
- }
-
w83977tf_enable_serial(SERIAL_DEV, CONFIG_TTYS0_BASE);
w83977tf_enable_serial(SERIAL_DEV, CONFIG_TTYS0_BASE);
- uart_init();
console_init();
report_bist_failure(bist);
console_init();
report_bist_failure(bist);
- /* Enable access to the full ROM chip, needed very early by CBFS. */
- i82371eb_enable_rom(PCI_DEV(0, 4, 0)); /* ISA bridge is 00:04.0. */
-
enable_smbus();
enable_smbus();
- /* dump_spd_registers(); */
+ dump_spd_registers();
sdram_set_registers();
sdram_set_spd_registers();
sdram_enable();
sdram_set_registers();
sdram_set_spd_registers();
sdram_enable();
- /* ram_check(0, 640 * 1024); */
}
}