sigh

[coreboot.git] / src / console / Kconfig

diff --git a/src/console/Kconfig b/src/console/Kconfig
index 90bfe9caa7292f7d4c1dd0d474fd1a760c59cec8..f1129a1279321884dac54777cb7a8ba487a53f71 100644 (file)
--- a/src/console/Kconfig
+++ b/src/console/Kconfig
@@ -1,10 +1,17 @@
-menu "Console options"
+menu "Console"

 # TODO: Rename to SERIAL_CONSOLE once Kconfig transition is complete.
 config CONSOLE_SERIAL8250
        bool "Serial port console output"
 # TODO: Rename to SERIAL_CONSOLE once Kconfig transition is complete.
 config CONSOLE_SERIAL8250
        bool "Serial port console output"

+       depends on HAVE_UART_IO_MAPPED

        default y
        help
        default y
        help

-         Send coreboot debug output to a serial port console.
+         Send coreboot debug output to an I/O mapped serial port console.
+
+config CONSOLE_SERIAL8250MEM
+       bool "Serial port console output (memory mapped)"
+       depends on HAVE_UART_MEMORY_MAPPED
+       help
+         Send coreboot debug output to a memory mapped serial port console.

 
 choice
        prompt "Serial port"
 
 choice
        prompt "Serial port"


@@ -43,7 +50,7 @@ config TTYS0_BASE
 choice
        prompt "Baud rate"
        default CONSOLE_SERIAL_115200
 choice
        prompt "Baud rate"
        default CONSOLE_SERIAL_115200

-       depends on CONSOLE_SERIAL8250
+       depends on CONSOLE_SERIAL8250 || CONSOLE_SERIAL8250MEM

 
 config CONSOLE_SERIAL_115200
        bool "115200"
 
 config CONSOLE_SERIAL_115200
        bool "115200"


@@ -82,7 +89,7 @@ config TTYS0_BAUD
 config TTYS0_LCS
        int
        default 3
 config TTYS0_LCS
        int
        default 3

-       depends on CONSOLE_SERIAL8250
+       depends on CONSOLE_SERIAL8250 || CONSOLE_SERIAL8250MEM

 
 # Use "select HAVE_USBDEBUG" on southbridges which have Debug Port code.
 config HAVE_USBDEBUG
 
 # Use "select HAVE_USBDEBUG" on southbridges which have Debug Port code.
 config HAVE_USBDEBUG


@@ -183,6 +190,33 @@ config CONSOLE_NE2K_IO_PORT
          32 bytes of IO spaces will be used (and align on 32 bytes
          boundary, qemu needs broader align)
 
          32 bytes of IO spaces will be used (and align on 32 bytes
          boundary, qemu needs broader align)
 

+config CONSOLE_CBMEM
+       depends on EARLY_CBMEM_INIT
+       bool "Send console output to a CBMEM buffer"
+       default n
+       help
+         Enable this to save the console output in a CBMEM buffer. This would
+         allow to see coreboot console output from Linux space.
+
+config CONSOLE_CBMEM_BUFFER_SIZE
+       depends on CONSOLE_CBMEM
+       hex "Room allocated for console output in CBMEM"
+       default 0x10000
+       help
+         Space allocated for console output storage in CBMEM. The default
+         value (64K or 0x10000 bytes) is large enough to accommodate
+         even the BIOS_SPEW level.
+
+config CONSOLE_CAR_BUFFER_SIZE
+       depends on CONSOLE_CBMEM
+       hex "Room allocated for console output in Cache as RAM"
+       default 0xc00
+       help
+         Console is used before RAM is initialized. This is the room reserved
+         in the DCACHE based RAM to keep console output before it can be
+         saved in a CBMEM buffer. 3K bytes should be enough even for the
+         BIOS_SPEW level.
+

 
 choice
        prompt "Maximum console log level"
 
 choice
        prompt "Maximum console log level"


@@ -326,14 +360,18 @@ config NO_POST
        bool "Don't show any POST codes"
        default n
 
        bool "Don't show any POST codes"
        default n
 

-config SERIAL_POST
-       bool "Show POST codes on the serial port console"
-       depends on CONSOLE_SERIAL8250 && !NO_POST
+config POST_PORT
+       hex
+       default 0x80
+
+config CONSOLE_POST
+       bool "Show POST codes on the debug console"
+       depends on !NO_POST

        default n
        help
          If enabled, coreboot will additionally print POST codes (which are
          usually displayed using a so-called "POST card" ISA/PCI/PCI-E
        default n
        help
          If enabled, coreboot will additionally print POST codes (which are
          usually displayed using a so-called "POST card" ISA/PCI/PCI-E

-         device) on the serial console.
+         device) on the debug console.

 
 endmenu
 
 
 endmenu