+end process;
+
+asyn: process(reset,dec_instr, alu_nxt, psw, reg,left_operand,right_operand)
+begin
+
+ condition <= dec_instr.condition;
+ op_group <= dec_instr.op_group;
+ op_detail <= dec_instr.op_detail;
+
+
+
+ alu_state <= (reg.result,dec_instr.daddr,psw,reg.alu_jump,reg.brpr,'0','0','0','0','0','0');
+
+
+ if reset = RESET_VALUE then
+ condition <= COND_NEVER;
+ else
+
+ end if;
+
+ reg_nxt.brpr <= alu_nxt.brpr;
+ reg_nxt.alu_jump <= alu_nxt.alu_jump;
+ reg_nxt.wr_en <= alu_nxt.reg_op;
+ reg_nxt.result <= alu_nxt.result;
+ reg_nxt.res_addr <= alu_nxt.result_addr;
+
+end process asyn;
+
+forward: process(regfile_val, reg_we, reg_addr, dec_instr)
+begin
+ left_operand <= dec_instr.src1;
+ right_operand <= dec_instr.src2;
+
+ if reg_we = '1' then
+ if dec_instr.saddr1 = reg_addr then
+ left_operand <= regfile_val;
+ end if;
+ if (dec_instr.saddr2 = reg_addr) and (dec_instr.op_detail(IMM_OPT) = '0') then
+ right_operand <= regfile_val;
+ end if;
+ end if;
+end process forward;
+
+result <= reg.result;
+result_addr <= reg.res_addr;
+alu_jump <= reg.alu_jump;
+brpr <= reg.brpr;
+wr_en <= reg.wr_en;
+
+dmem <= alu_nxt.mem_op;
+
+--dmem <= reg.result(4);
+
+dmem_write_en <= alu_nxt.mem_en;
+
+--dmem_write_en <= reg.result(0);
+--dmem_write_en <= '1';
+
+hword <= alu_nxt.hw_op;
+
+--hword <= reg.result(1);
+
+byte_s <= alu_nxt.byte_op;