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Added missing signals to sensitivity and extended writeback
[calu.git]
/
cpu
/
src
/
common_pkg.vhd
diff --git
a/cpu/src/common_pkg.vhd
b/cpu/src/common_pkg.vhd
index 1e2a42d776c696fcae497673e3cdad60aa99e3f8..b223718326fa32e23875eda6da0a449742c1fb81 100755
(executable)
--- a/
cpu/src/common_pkg.vhd
+++ b/
cpu/src/common_pkg.vhd
@@
-18,7
+18,8
@@
package common_pkg is
subtype word_t is std_logic_vector(WORD_WIDTH-1 downto 0);
subtype gp_register_t is word_t;
subtype word_t is std_logic_vector(WORD_WIDTH-1 downto 0);
subtype gp_register_t is word_t;
-
+
+ subtype byte_en_t is std_logic_vector((gp_register_t'length/byte_t'length-1) downto 0);
constant REG_ZERO : gp_register_t := (others => '0');
constant REG_ZERO : gp_register_t := (others => '0');
@@
-134,6
+135,8
@@
package common_pkg is
dmem_write_en : std_logic; --ureg
hword : std_logic; --ureg
byte_s : std_logic;
dmem_write_en : std_logic; --ureg
hword : std_logic; --ureg
byte_s : std_logic;
+ byte_en : byte_en_t;
+ data : gp_register_t;
end record;
type exec2wb_rec is record
end record;
type exec2wb_rec is record