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Added missing signals to sensitivity and extended writeback
[calu.git]
/
cpu
/
src
/
alu_b.vhd
diff --git
a/cpu/src/alu_b.vhd
b/cpu/src/alu_b.vhd
index f0eda881851fd219ba4bf32134051457331213c5..9a0749155f5c5070eacfb780f779a2516fb67f29 100755
(executable)
--- a/
cpu/src/alu_b.vhd
+++ b/
cpu/src/alu_b.vhd
@@
-188,6
+188,9
@@
begin
--result_v.reg_op := '1';
\r
end if;
\r
\r
--result_v.reg_op := '1';
\r
end if;
\r
\r
+ -- if result_v.mem_op = '0' then --- do this if selecting enable for extension modules is too slow.
\r
+ -- addr <= (others => '0');
\r
+ -- end if;
\r
alu_result <= result_v;
\r
pinc <= pinc_v;
\r
pwr_en <= pwr_en_v;
\r
alu_result <= result_v;
\r
pinc <= pinc_v;
\r
pwr_en <= pwr_en_v;
\r