1 # Config file for Embedded Planet EP405PC board
2 # This will make a target directory of ./ep405pc
5 mainboard embeddedplanet/ep405pc
8 ## Enable PPC405 instructions
9 option CONFIG_CPU_OPT="-mcpu=405"
11 ## use a cross compiler
12 #option CONFIG_CROSS_COMPILE="powerpc-ibm-eabi-"
14 ## Use stage 1 initialization code
15 option CONFIG_USE_INIT=1
17 ## Use chip configuration
18 option CONFIG_CHIP_CONFIGURE=1
20 ## We don't use compressed image
21 option CONFIG_COMPRESS=0
23 ## Turn off POST codes
24 option CONFIG_NO_POST=1
26 ## Enable serial console
27 option CONFIG_DEFAULT_CONSOLE_LOGLEVEL=8
28 option CONFIG_CONSOLE_SERIAL8250=1
29 # Divisor of 69 == 9600 baud due to weird clocking
30 option CONFIG_TTYS0_DIV=69
31 option CONFIG_TTYS0_BAUD=9600
33 ## Boot linux from IDE
35 option CONFIG_FS_PAYLOAD=1
36 option CONFIG_FS_EXT2=1
37 option CONFIG_FS_ISO9660=1
38 option CONFIG_FS_FAT=1
39 option CONFIG_AUTOBOOT_CMDLINE="hda1:/vmlinuz"
41 option CONFIG_ROM_SIZE=1024*1024
43 ## Board has fixed size RAM
44 option CONFIG_EMBEDDED_RAM_SIZE=64*1024*1024
46 ## Coreboot C code runs at this location in RAM
47 option CONFIG_RAMBASE=0x00100000
52 option CONFIG_STACK_SIZE=0x10000
57 option CONFIG_HEAP_SIZE=0x10000
62 option CONFIG_SYS_CLK_FREQ=33
65 option CONFIG_ROMBASE=0xfff00000
67 ## Reset vector address
68 option CONFIG_RESET=0xfffffffc
71 option CONFIG_EXCEPTION_VECTORS=CONFIG_ROMBASE+0x100
73 ## coreboot ROM start address
74 option CONFIG_ROMSTART=0xfff03000
76 ## coreboot C code runs at this location in RAM
77 option CONFIG_RAMBASE=0x00100000
81 buildrom ./coreboot.rom CONFIG_ROM_SIZE "normal"