1 # Config file for the ThinCan dbe61
4 mainboard artecgroup/dbe61
6 # HACK to get the right TSC support.
7 option CONFIG_TSC_X86RDTSC_CALIBRATE_WITH_TIMER2=1
9 option CONFIG_COMPRESSED_PAYLOAD_NRV2B=0
10 option CONFIG_COMPRESSED_PAYLOAD_LZMA=0
12 ## ROM_SIZE is the total number of bytes allocated for coreboot use
13 ## (normal AND fallback images and payloads).
14 ## leave 36k for vsa and 32K for video ROM
15 #option ROM_SIZE = 1024*256 - 36*1024 - 32 * 1024
18 option ROM_SIZE = 1024*512 - 36*1024
20 # ROM_IMAGE_SIZE is the maximum number of bytes allowed for a coreboot image,
21 ## not including any payload.
22 option ROM_IMAGE_SIZE=64*1024
24 option FALLBACK_SIZE = ROM_SIZE
26 option DEFAULT_CONSOLE_LOGLEVEL = 11
27 option MAXIMUM_CONSOLE_LOGLEVEL = 11
29 option USE_FALLBACK_IMAGE=1
30 option COREBOOT_EXTRA_VERSION=".0Fallback"
31 payload ../payload.elf
34 buildrom ./dbe61.rom ROM_SIZE "fallback"