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3 -- Filename: textmode_vga_h_sm.vhd
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6 -- Short Description:
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7 -- ==================
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8 -- Entity declaration of the horizontal VGA timing finite state machine
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13 use ieee.std_logic_1164.all;
14 use work.math_pkg.all;
15 use work.textmode_vga_pkg.all;
16 use work.textmode_vga_platform_dependent_pkg.all;
17 use work.font_pkg.all;
19 entity textmode_vga_h_sm is
22 sys_clk, sys_res_n : in std_logic;
24 background_color : in std_logic_vector(RED_BITS + GREEN_BITS + BLUE_BITS - 1 downto 0);
26 char_cnt : out std_logic_vector(log2c(COLUMN_COUNT) - 1 downto 0);
27 char_line_cnt : in std_logic_vector(log2c(LINE_COUNT) - 1 downto 0);
28 cursor_column : in std_logic_vector(log2c(COLUMN_COUNT) - 1 downto 0);
29 cursor_line : in std_logic_vector(log2c(LINE_COUNT) - 1 downto 0);
30 cursor_color : in std_logic_vector(RED_BITS + GREEN_BITS + BLUE_BITS - 1 downto 0);
31 cursor_state : in CURSOR_STATE_TYPE;
32 decoded_char : in std_logic_vector(0 to CHAR_WIDTH - 1);
33 color : in std_logic_vector(RED_BITS + GREEN_BITS + BLUE_BITS - 1 downto 0);
35 is_data_line : in std_logic;
36 is_eol : out std_logic;
38 hsync_n : out std_logic;
39 rgb : out std_logic_vector(RED_BITS + GREEN_BITS + BLUE_BITS - 1 downto 0);
42 end entity textmode_vga_h_sm;