The ARRAY_SIZE macro is convenient, yet mostly unused. Switch lots of
[coreboot.git] / src / superio / winbond / w83627thf / superio.c
1 /* Copyright 2000  AG Electronics Ltd. */
2 /* Copyright 2003-2004 Linux Networx */
3 /* Copyright 2004 Tyan 
4    By LYH change from PC87360 */
5 /* This code is distributed without warranty under the GPL v2 (see COPYING) */
6
7 #include <arch/io.h>
8 #include <device/device.h>
9 #include <device/pnp.h>
10 #include <console/console.h>
11 #include <string.h>
12 #include <bitops.h>
13 #include <uart8250.h>
14 #include <pc80/keyboard.h>
15 #include <stdlib.h>
16 #include "chip.h"
17 #include "w83627thf.h"
18
19 static void w83627thf_enter_ext_func_mode(device_t dev) 
20 {
21         outb(0x87, dev->path.u.pnp.port);
22         outb(0x87, dev->path.u.pnp.port);
23 }
24 static void w83627thf_exit_ext_func_mode(device_t dev) 
25 {
26         outb(0xaa, dev->path.u.pnp.port);
27 }
28
29 static void w83627thf_init(device_t dev)
30 {
31         struct superio_winbond_w83627thf_config *conf;
32         struct resource *res0, *res1;
33         /* Wishlist handle well known programming interfaces more
34          * generically.
35          */
36         if (!dev->enabled) {
37                 return;
38         }
39         conf = dev->chip_info;
40         switch(dev->path.u.pnp.device) {
41         case W83627THF_SP1: 
42                 res0 = find_resource(dev, PNP_IDX_IO0);
43                 init_uart8250(res0->base, &conf->com1);
44                 break;
45         case W83627THF_SP2:
46                 res0 = find_resource(dev, PNP_IDX_IO0);
47                 init_uart8250(res0->base, &conf->com2);
48                 break;
49         case W83627THF_KBC:
50                 res0 = find_resource(dev, PNP_IDX_IO0);
51                 res1 = find_resource(dev, PNP_IDX_IO1);
52                 init_pc_keyboard(res0->base, res1->base, &conf->keyboard);
53                 break;
54         }
55 }
56
57 static void w83627thf_set_resources(device_t dev)
58 {
59         w83627thf_enter_ext_func_mode(dev);
60         pnp_set_resources(dev);
61         w83627thf_exit_ext_func_mode(dev);
62 }
63
64 static void w83627thf_enable_resources(device_t dev)
65 {
66         w83627thf_enter_ext_func_mode(dev);
67         pnp_enable_resources(dev);
68         w83627thf_exit_ext_func_mode(dev);
69 }
70
71 static void w83627thf_enable(device_t dev)
72 {
73         w83627thf_enter_ext_func_mode(dev);   
74         pnp_enable(dev);
75         w83627thf_exit_ext_func_mode(dev);  
76 }
77
78
79 static struct device_operations ops = {
80         .read_resources   = pnp_read_resources,
81         .set_resources    = w83627thf_set_resources,
82         .enable_resources = w83627thf_enable_resources,
83         .enable           = w83627thf_enable,
84         .init             = w83627thf_init,
85 };
86
87 static struct pnp_info pnp_dev_info[] = {
88         { &ops, W83627THF_FDC,  PNP_IO0 | PNP_IRQ0 | PNP_DRQ0, { 0x07f8, 0}, },
89         { &ops, W83627THF_PP,   PNP_IO0 | PNP_IRQ0 | PNP_DRQ0, { 0x07f8, 0}, },
90         { &ops, W83627THF_SP1,  PNP_IO0 | PNP_IRQ0, { 0x7f8, 0 }, },
91         { &ops, W83627THF_SP2,  PNP_IO0 | PNP_IRQ0, { 0x7f8, 0 }, },
92         // No 4 { 0,},
93         { &ops, W83627THF_KBC,  PNP_IO0 | PNP_IO1 | PNP_IRQ0 | PNP_IRQ1, { 0x7ff, 0 }, { 0x7ff, 0x4}, },
94         { &ops, W83627THF_CIR, PNP_IO0 | PNP_IRQ0, { 0x7f8, 0 }, },
95         { &ops, W83627THF_GAME_MIDI_GPIO1, PNP_IO0 | PNP_IO1 | PNP_IRQ0, { 0x7ff, 0 }, {0x7fe, 4} },
96         // { W83627THF_GPIO2,},
97         // { W83627THF_GPIO3,},
98         { &ops, W83627THF_ACPI, PNP_IRQ0,  },
99         { &ops, W83627THF_HWM,  PNP_IO0 | PNP_IRQ0, { 0xff8, 0 } },
100 };
101
102 static void enable_dev(device_t dev)
103 {
104         pnp_enable_devices(dev, &ops,
105                 ARRAY_SIZE(pnp_dev_info), pnp_dev_info);
106 }
107
108 struct chip_operations superio_winbond_w83627thf_ops = {
109         CHIP_NAME("Winbond W83627THF Super I/O")
110         .enable_dev = enable_dev,
111 };