2 * lpc47n217_early_serial.c: Pre-RAM driver for SMSC LPC47N217 Super I/O chip
4 * Copyright (C) 2005 Digital Design Corporation
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or
9 * (at your option) any later version.
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, write to the Free Software
18 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
21 #include <arch/romcc_io.h>
23 #include "lpc47n217.h"
25 //----------------------------------------------------------------------------------
26 // Function: pnp_enter_conf_state
27 // Parameters: dev - high 8 bits = Super I/O port
29 // Description: Enable access to the LPC47N217's configuration registers.
31 static inline void pnp_enter_conf_state(device_t dev) {
32 unsigned port = dev>>8;
36 //----------------------------------------------------------------------------------
37 // Function: pnp_exit_conf_state
38 // Parameters: dev - high 8 bits = Super I/O port
40 // Description: Disable access to the LPC47N217's configuration registers.
42 static void pnp_exit_conf_state(device_t dev) {
43 unsigned port = dev>>8;
47 //----------------------------------------------------------------------------------
48 // Function: lpc47n217_pnp_set_iobase
49 // Parameters: dev - high 8 bits = Super I/O port,
50 // low 8 bits = logical device number (per lpc47n217.h)
51 // iobase - base I/O port for the logical device
53 // Description: Program the base I/O port for the specified logical device.
55 void lpc47n217_pnp_set_iobase(device_t dev, unsigned iobase)
57 // LPC47N217 requires base ports to be a multiple of 4
58 ASSERT(!(iobase & 0x3));
62 pnp_write_config(dev, 0x23, (iobase >> 2) & 0xff);
66 pnp_write_config(dev, 0x24, (iobase >> 2) & 0xff);
70 pnp_write_config(dev, 0x25, (iobase >> 2) & 0xff);
78 //----------------------------------------------------------------------------------
79 // Function: lpc47n217_pnp_set_enable
80 // Parameters: dev - high 8 bits = Super I/O port,
81 // low 8 bits = logical device number (per lpc47n217.h)
82 // enable - 0 to disable, anythig else to enable
84 // Description: Enable or disable the specified logical device.
85 // Technically, a full disable requires setting the device's base
86 // I/O port below 0x100. We don't do that here, because we don't
87 // have access to a data structure that specifies what the 'real'
88 // base port is (when asked to enable the device). Also the function
89 // is used only to disable the device while its true base port is
90 // programmed (see lpc47n217_enable_serial() below).
92 void lpc47n217_pnp_set_enable(device_t dev, int enable)
94 uint8_t power_register = 0;
95 uint8_t power_mask = 0;
96 uint8_t current_power;
101 power_register = 0x01;
106 power_register = 0x02;
111 power_register = 0x02;
119 current_power = pnp_read_config(dev, power_register);
120 new_power = current_power & ~power_mask; // disable by default
123 new_power |= power_mask; // Enable
125 pnp_write_config(dev, power_register, new_power);
128 //----------------------------------------------------------------------------------
129 // Function: lpc47n217_enable_serial
130 // Parameters: dev - high 8 bits = Super I/O port,
131 // low 8 bits = logical device number (per lpc47n217.h)
132 // iobase - processor I/O port address to assign to this serial device
133 // Return Value: bool
134 // Description: Configure the base I/O port of the specified serial device
135 // and enable the serial device.
137 static void lpc47n217_enable_serial(device_t dev, unsigned iobase)
139 // NOTE: Cannot use pnp_set_XXX() here because they assume chip
140 // support for logical devices, which the LPC47N217 doesn't have
142 pnp_enter_conf_state(dev);
143 lpc47n217_pnp_set_enable(dev, 0);
144 lpc47n217_pnp_set_iobase(dev, iobase);
145 lpc47n217_pnp_set_enable(dev, 1);
146 pnp_exit_conf_state(dev);