2 * This file is part of the coreboot project.
4 * Copyright (C) 2007 Uwe Hermann <uwe@hermann-uwe.de>
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or
9 * (at your option) any later version.
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, write to the Free Software
18 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
22 #include <console/console.h>
23 #include <device/device.h>
24 #include <device/pci.h>
25 #include <device/pci_ids.h>
26 #include <pc80/isa-dma.h>
27 #include <pc80/mc146818rtc.h>
30 static void isa_init(struct device *dev)
35 /* Initialize the real time clock (RTC). */
38 /* Enable access to all BIOS regions. */
39 reg16 = pci_read_config16(dev, XBCS);
40 reg16 |= LOWER_BIOS_ENABLE;
41 reg16 |= EXT_BIOS_ENABLE;
42 reg16 |= EXT_BIOS_ENABLE_1MB;
43 reg16 &= ~(WRITE_PROTECT_ENABLE); /* Disable ROM write access. */
44 pci_write_config16(dev, XBCS, reg16);
47 * The PIIX4 can support the full ISA bus, or the Extended I/O (EIO)
48 * bus, which is a subset of ISA. We select the full ISA bus here.
50 reg32 = pci_read_config32(dev, GENCFG);
51 reg32 |= ISA; /* Select ISA, not EIO. */
52 pci_write_config16(dev, GENCFG, reg32);
54 /* Initialize ISA DMA. */
58 static void sb_read_resources(struct device *dev)
62 pci_dev_read_resources(dev);
64 res = new_resource(dev, 1);
67 res->limit = 0xffffUL;
68 res->flags = IORESOURCE_IO | IORESOURCE_ASSIGNED | IORESOURCE_FIXED;
70 res = new_resource(dev, 2);
71 res->base = 0xff800000UL;
72 res->size = 0x00800000UL; /* 8 MB for flash */
73 res->flags = IORESOURCE_MEM | IORESOURCE_ASSIGNED | IORESOURCE_FIXED;
75 res = new_resource(dev, 3); /* IOAPIC */
76 res->base = 0xfec00000;
77 res->size = 0x00001000;
78 res->flags = IORESOURCE_MEM | IORESOURCE_ASSIGNED | IORESOURCE_FIXED;
81 const struct device_operations isa_ops = {
82 .read_resources = sb_read_resources,
83 .set_resources = pci_dev_set_resources,
84 .enable_resources = pci_dev_enable_resources,
86 .scan_bus = scan_static_bus, /* TODO: Needed? */
88 .ops_pci = 0, /* No subsystem IDs on 82371EB! */
91 static const struct pci_driver isa_driver __pci_driver = {
93 .vendor = PCI_VENDOR_ID_INTEL,
94 .device = PCI_DEVICE_ID_INTEL_82371AB_ISA,
97 static const struct pci_driver isa_SB_driver __pci_driver = {
99 .vendor = PCI_VENDOR_ID_INTEL,
100 .device = PCI_DEVICE_ID_INTEL_82371SB_ISA,