2 * This file is part of the coreboot project.
4 * Copyright (C) 2008 Advanced Micro Devices, Inc.
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; version 2 of the License.
10 * This program is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details.
15 * You should have received a copy of the GNU General Public License
16 * along with this program; if not, write to the Free Software
17 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
20 #include <console/console.h>
24 #include <device/device.h>
25 #include <device/pci.h>
26 #include <device/pci_ids.h>
27 #include <device/pci_ops.h>
30 static device_t find_sm_dev(device_t dev, u32 devfn)
34 sm_dev = dev_find_slot(dev->bus->secondary, devfn);
38 if ((sm_dev->vendor != PCI_VENDOR_ID_ATI) ||
39 ((sm_dev->device != PCI_DEVICE_ID_ATI_SB600_SM))) {
41 id = pci_read_config32(sm_dev, PCI_VENDOR_ID);
43 (PCI_VENDOR_ID_ATI | (PCI_DEVICE_ID_ATI_SB600_SM << 16))))
52 void set_sm_enable_bits(device_t sm_dev, u32 reg_pos, u32 mask, u32 val)
55 reg = reg_old = pci_read_config32(sm_dev, reg_pos);
59 pci_write_config32(sm_dev, reg_pos, reg);
63 static void pmio_write_index(u16 port_base, u8 reg, u8 value)
66 outb(value, port_base + 1);
69 static u8 pmio_read_index(u16 port_base, u8 reg)
72 return inb(port_base + 1);
75 void pm_iowrite(u8 reg, u8 value)
77 pmio_write_index(PM_INDEX, reg, value);
82 return pmio_read_index(PM_INDEX, reg);
85 void pm2_iowrite(u8 reg, u8 value)
87 pmio_write_index(PM2_INDEX, reg, value);
92 return pmio_read_index(PM2_INDEX, reg);
95 static void set_pmio_enable_bits(device_t sm_dev, u32 reg_pos,
99 reg = reg_old = pm_ioread(reg_pos);
102 if (reg != reg_old) {
103 pm_iowrite(reg_pos, reg);
107 void sb600_enable(device_t dev)
110 device_t bus_dev = 0;
115 /* struct southbridge_ati_sb600_config *conf; */
116 /* conf = dev->chip_info; */
121 printk(BIOS_DEBUG, "sb600_enable()\n");
124 * 0:12.0 SATA bit 8 of sm_dev 0xac : 1 - enable, default + 32 * 3
125 * 0:13.1 USB-1 bit 2 of sm_dev 0x68
126 * 0:13.2 USB-2 bit 3 of sm_dev 0x68
127 * 0:13.3 USB-3 bit 4 of sm_dev 0x68
128 * 0:13.4 USB-4 bit 5 of sm_dev 0x68
129 * 0:13.5 USB2 bit 0 of sm_dev 0x68 : 1 - enable, default
132 * 0:14.2 HDA bit 3 of pm_io 0x59 : 1 - enable, default + 32 * 4
133 * 0:14.3 LPC bit 20 of sm_dev 0x64 : 0 - disable, default + 32 * 1
135 * 0:14.5 ACI bit 0 of pm_io 0x59 : 0 - enable, default
136 * 0:14.6 MCI bit 1 of pm_io 0x59 : 0 - enable, default
138 if (dev->device == 0x0000) {
139 vendorid = pci_read_config32(dev, PCI_VENDOR_ID);
140 deviceid = (vendorid >> 16) & 0xffff;
143 vendorid = dev->vendor;
144 deviceid = dev->device;
146 bus_dev = dev->bus->dev;
147 if ((bus_dev->vendor == PCI_VENDOR_ID_ATI) &&
148 (bus_dev->device == PCI_DEVICE_ID_ATI_SB600_PCI)) {
149 devfn = (bus_dev->path.pci.devfn) & ~7;
150 sm_dev = find_sm_dev(bus_dev, devfn);
154 /* something under 00:01.0 */
155 switch (dev->path.pci.devfn) {
163 i = (dev->path.pci.devfn) & ~7;
165 for (devfn = (0x14 << 3); devfn <= i; devfn += (1 << 3)) {
166 sm_dev = find_sm_dev(dev, devfn);
173 switch (dev->path.pci.devfn - (devfn - (0x14 << 3))) {
174 case (0x12 << 3) | 0:
176 set_sm_enable_bits(sm_dev, 0xac, 1 << index,
177 (dev->enabled ? 1 : 0) << index);
180 case (0x13 << 3) | 0:
181 case (0x13 << 3) | 1:
182 case (0x13 << 3) | 2:
183 case (0x13 << 3) | 3:
184 case (0x13 << 3) | 4:
185 case (0x13 << 3) | 5:
186 index = dev->path.pci.devfn & 7;
189 set_sm_enable_bits(sm_dev, 0x68, 1 << index,
190 (dev->enabled ? 1 : 0) << index);
193 case (0x14 << 3) | 0:
196 case (0x14 << 3) | 1:
199 case (0x14 << 3) | 2:
201 set_pmio_enable_bits(sm_dev, 0x59, 1 << index,
202 (dev->enabled ? 1 : 0) << index);
205 case (0x14 << 3) | 3:
207 set_sm_enable_bits(sm_dev, 0x64, 1 << index,
208 (dev->enabled ? 1 : 0) << index);
211 case (0x14 << 3) | 4:
214 case (0x14 << 3) | 5:
215 case (0x14 << 3) | 6:
216 index = dev->path.pci.devfn & 7;
218 set_pmio_enable_bits(sm_dev, 0x59, 1 << index,
219 (dev->enabled ? 0 : 1) << index);
223 printk(BIOS_DEBUG, "unknown dev: %s deviceid=%4x\n", dev_path(dev),
228 struct chip_operations southbridge_amd_sb600_ops = {
229 CHIP_NAME("ATI SB600")
230 .enable_dev = sb600_enable,